gates 0.1.0

Gates is a simple library to simulate logical gates.
Documentation 
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124

mod e_gates;
use crate::Signal::*;
pub use e_gates::*;

#[derive(Debug, PartialEq, Copy, Clone, Eq)]
pub enum Signal {
    On,
    Off,
}

#[macro_export]
macro_rules! and {
	($x:expr)=>($x);
	($x:expr,$($y:expr),+)=>{
		and($x,and!($($y),+))
	}
}

#[macro_export]
macro_rules! or {
	($x:expr)=>($x);
	($x:expr,$($y:expr),+)=>{
		or($x,or!($($y),+))
	}
}

impl From<bool> for Signal {
    fn from(input: bool) -> Self {
        match input {
            true => On,
            false => Off,
        }
    }
}

macro_rules! int_to_Signal {
	($($t:ty),*) => {
		$(impl From<$t>for Signal{
			fn from(input: $t)->Self{
				if input> 0{
					return On;
				}
				Off
			}
		})*
	}
}

macro_rules! real_to_Signal {
	($($t:ty),*) => {
		$(impl From<$t>for Signal{
			fn from(input: $t)->Self{
				if input> 0.0{
					return On;
				}
				Off
			}
		})*
	}
}

int_to_Signal!(u8, u16, u32, u64, u128, i8, i16, i32, i64, i128);
real_to_Signal!(f32, f64);

#[cfg(test)]
mod test {
    use crate::*;
    #[test]
    fn from_bool() {
        assert_eq!(Signal::from(true), On);
        assert_eq!(Signal::from(false), Off);
    }
    #[test]
    fn from_integer() {
        assert_eq!(Signal::from(1u8), On);
        assert_eq!(Signal::from(0u8), Off);
        assert_eq!(Signal::from(1u16), On);
        assert_eq!(Signal::from(0u16), Off);
        assert_eq!(Signal::from(1u32), On);
        assert_eq!(Signal::from(0u32), Off);
        assert_eq!(Signal::from(1u64), On);
        assert_eq!(Signal::from(0u64), Off);
        assert_eq!(Signal::from(1u128), On);
        assert_eq!(Signal::from(0u128), Off);

        assert_eq!(Signal::from(1i8), On);
        assert_eq!(Signal::from(0i8), Off);
        assert_eq!(Signal::from(1i16), On);
        assert_eq!(Signal::from(0i16), Off);
        assert_eq!(Signal::from(1i32), On);
        assert_eq!(Signal::from(0i32), Off);
        assert_eq!(Signal::from(1i64), On);
        assert_eq!(Signal::from(0i64), Off);
        assert_eq!(Signal::from(1i128), On);
        assert_eq!(Signal::from(0i128), Off);
    }
    #[test]
    fn from_real() {
        assert_eq!(Signal::from(1f32), On);
        assert_eq!(Signal::from(0f32), Off);
        assert_eq!(Signal::from(1f64), On);
        assert_eq!(Signal::from(0f64), Off)
    }
    #[test]
    fn multi_and() {
        assert_eq!(and!(On), On);
        assert_eq!(and!(On, On), On);
        assert_eq!(and!(On, On, On), On);
        assert_eq!(and!(Off), Off);
        assert_eq!(and!(Off, On), Off);
        assert_eq!(and!(Off, On, Off), Off);
    }

    #[test]
    fn multi_or() {
        assert_eq!(or!(On), On);
        assert_eq!(or!(On, On), On);
        assert_eq!(or!(On, On, On), On);
        assert_eq!(or!(Off), Off);
        assert_eq!(or!(Off, On), On);
        assert_eq!(or!(Off, On, Off), On);
        assert_eq!(or!(Off, Off, Off), Off);
    }
}