1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
//! The int8/int4 SIMD perf core (Phase 3, plan §6) — the runtime-dispatched
//! GEMM tier stack.
//!
//! This module owns the model's int8 matrix-multiply kernels and the runtime
//! ISA dispatch that selects the fastest one for the host CPU, with a portable
//! scalar oracle as the always-present floor. The public surface is exactly the
//! two GEMM entrypoints re-exported below ([`igemm_s8s8`] / [`igemm_u8s8`]) plus
//! the hardware-capability and effective-route helpers for `focr robot backends`.
//!
//! ## Layout
//!
//! * [`scalar`] — the **reference oracle** and portable fallback. No `unsafe`;
//! a tight scalar dot product LLVM autovectorizes (doctrine #3). Every
//! accelerated kernel is tested bit-identical against it.
//! * [`arm`] — aarch64 NEON kernels: SMMLA/i8mm (the register-blocked wedge) and
//! SDOT/dotprod. Compiled only on `target_arch = "aarch64"`; the audited
//! `unsafe` intrinsic island lives there.
//! * [`x86`] — x86-64 kernels: AVX-512-VNNI, AVX-VNNI, AVX2. Compiled only on
//! `target_arch = "x86_64"`.
//! * [`wasm128`] — the browser lane: `i32x4.dot_i16x8_s` int8 kernels and the
//! in-register nibble-unpack int4 kernel. Compiled only on
//! `target_arch = "wasm32"`, and accelerated only under
//! `-C target-feature=+simd128` (a module-level wasm feature — the engine
//! either has it or refuses the module, so there is nothing to detect at
//! runtime).
//! * [`int4`] — int4 (2 nibbles/byte, per-group scales) unpack-to-int8 path; the
//! decode-bandwidth wedge (doctrine #4). Portable (the unpack is scalar; it
//! feeds the same dispatched int8 GEMM), so it is built on every target.
//! * [`dispatch`] — runtime feature detection (`is_aarch64_feature_detected!` /
//! `is_x86_feature_detected!`), the cached [`IsaTier`] selection, and the
//! public GEMM entrypoint that routes to the best available kernel (else
//! scalar). The dispatch contains no `unsafe` — it only *selects* which safe
//! wrapper to call, and only ever selects a tier whose CPU feature it has
//! confirmed present (the safety precondition for the intrinsics).
//!
//! ## Contract (PINNED — identical across every backend)
//!
//! ```text
//! // C[M,N] += A[M,K] (row-major) · B[N,K] (OUTPUT-CHANNEL-major) -> i32[M,N]
//! pub fn igemm_s8s8(a: &[i8], b: &[i8], m, k, n, out: &mut [i32]);
//! pub fn igemm_u8s8(a: &[u8], b: &[i8], m, k, n, out: &mut [i32]);
//! ```
//!
//! `b` is **output-channel-major** `[N, K]` (weight row `o` is `b[o*K..o*K+K]`),
//! matching `tensor::QInt8` and `nn::linear_int8_dynamic`. `out` is `+=` into an
//! i32 buffer of length `m*n`. Accumulation is i32; the worst-case-K overflow
//! proof is doctrine #6 (`tests/int32_overflow_proof.rs` + the `scalar` tests).
//!
//! Crate-root `#![deny(unsafe_code)]` holds by default; only the named
//! `arm`/`x86` islands relax it behind
//! `#[allow(unsafe_code, unsafe_op_in_unsafe_fn)]`, each with `// SAFETY:` notes
//! and a bit-identical scalar fallback.
// Arch-specific intrinsic modules. Each is compiled only on its native arch so
// the crate builds on every target (an aarch64-only intrinsic module would not
// type-check under an x86 build, and vice versa). `dispatch.rs` references their
// entrypoints only inside the matching `#[cfg(target_arch = ...)]` match arm, so
// gating the module declaration the same way keeps the whole stack coherent:
// on a non-native arch the module simply does not exist and dispatch falls back
// to the always-present `scalar` floor.
// ── Public SIMD API ─────────────────────────────────────────────────────────
//
// The rest of the engine calls these (and `nn::linear_int8_dynamic` slots its
// int8 path under them). They are the runtime-dispatched entrypoints; callers
// never name a tier.
pub use ;