firewire_bebob_protocols/
esi.rs

1// SPDX-License-Identifier: LGPL-3.0-or-later
2// Copyright (c) 2021 Takashi Sakamoto
3
4//! Protocol implementation for ESI Quatafire series.
5//!
6//! The module includes structure, enumeration, and trait and its implementation for protocol
7//! defined by Ego Systems (ESI) for Quatafire series.
8//!
9//! DM1000 is used for ESI Quatafire 610.
10//!
11//! ## Diagram of internal signal flow for Quatafire 610
12//!
13//! ```text
14//! analog-input-1/2  -------+----------> stream-output-1/2
15//! analog-input-3/4  -------|-+--------> stream-output-3/4
16//! digital-input-1/2 -------|-|-+------> stream-output-5/6
17//!                          | | |
18//!                          v v v
19//!                       ++=======++
20//! stream-input-1/2 ---> || 8 x 2 ||
21//!                       || mixer ||---> analog-output-1/2
22//!                       ++=======++
23//! stream-input-3/4 -------------------> analog-output-3/4
24//! stream-input-5/6 -------------------> analog-output-5/6
25//! stream-input-7/8 -------------------> digital-output-1/2
26//! ```
27//!
28//! The protocol implementation for ESI Quatafire 610 was written with firmware version below:
29//!
30//! ```sh
31//! $ cargo run --bin bco-bootloader-info -- /dev/fw1
32//! protocol:
33//!   version: 1
34//! bootloader:
35//!   timestamp: 2004-06-08T02:57:12+0000
36//!   version: 0.0.0
37//! hardware:
38//!   GUID: 0x00000042000f1b10
39//!   model ID: 0x000081
40//!   revision: 0.0.1
41//! software:
42//!   timestamp: 2004-08-04T06:37:54+0000
43//!   ID: 0x00010064
44//!   revision: 0.0.2632
45//! image:
46//!   base address: 0x20080000
47//!   maximum size: 0x180000
48//! ```
49
50use super::*;
51
52/// The protocol implementation for media and sampling clock of Quatafire 610.
53#[derive(Default, Debug)]
54pub struct Quatafire610ClkProtocol;
55
56impl MediaClockFrequencyOperation for Quatafire610ClkProtocol {
57    const FREQ_LIST: &'static [u32] = &[44100, 48000, 88200, 96000, 192000];
58}
59
60impl SamplingClockSourceOperation for Quatafire610ClkProtocol {
61    const DST: SignalAddr = SignalAddr::Subunit(SignalSubunitAddr {
62        subunit: MUSIC_SUBUNIT_0,
63        plug_id: 0x01,
64    });
65
66    const SRC_LIST: &'static [SignalAddr] = &[
67        // Internal.
68        SignalAddr::Subunit(SignalSubunitAddr {
69            subunit: MUSIC_SUBUNIT_0,
70            plug_id: 0x01,
71        }),
72    ];
73}
74
75/// The protocol implementation for physical input of Quatafire 610.
76#[derive(Default, Debug)]
77pub struct Quatafire610PhysInputProtocol;
78
79impl AvcAudioFeatureSpecification for Quatafire610PhysInputProtocol {
80    const ENTRIES: &'static [(u8, AudioCh)] = &[
81        (0x01, AudioCh::Each(0)), // analog-input-1
82        (0x01, AudioCh::Each(1)), // analog-input-2
83        (0x02, AudioCh::Each(0)), // analog-input-3
84        (0x02, AudioCh::Each(1)), // analog-input-4
85        (0x03, AudioCh::Each(0)), // analog-input-5
86        (0x03, AudioCh::Each(1)), // analog-input-6
87    ];
88}
89
90impl AvcLevelOperation for Quatafire610PhysInputProtocol {}
91
92impl AvcLrBalanceOperation for Quatafire610PhysInputProtocol {}
93
94/// The protocol implementation for physical output of Quatafire 610.
95#[derive(Default, Debug)]
96pub struct Quatafire610PhysOutputProtocol;
97
98impl AvcAudioFeatureSpecification for Quatafire610PhysOutputProtocol {
99    const ENTRIES: &'static [(u8, AudioCh)] = &[
100        (0x04, AudioCh::Each(0)), // analog-output-1
101        (0x04, AudioCh::Each(1)), // analog-output-2
102        (0x04, AudioCh::Each(2)), // analog-output-3
103        (0x04, AudioCh::Each(3)), // analog-output-4
104        (0x04, AudioCh::Each(4)), // analog-output-5
105        (0x04, AudioCh::Each(5)), // analog-output-6
106        (0x04, AudioCh::Each(6)), // analog-output-7
107        (0x04, AudioCh::Each(7)), // analog-output-8
108    ];
109}
110
111impl AvcLevelOperation for Quatafire610PhysOutputProtocol {}