1pub mod battery;
47pub mod cpu;
48pub mod dmi;
49pub mod drm;
50pub mod init;
51pub mod parts;
52pub mod ram;
53pub mod sys;
54pub mod vulnerabilities;
55pub mod cpu_freq;
56pub mod soft;
57
58pub mod traits;
59pub mod utils;
60
61use crate::traits::ToPlainText;
62use anyhow::Result;
63use serde::Serialize;
64
65pub const FX_LIB_VERSION: &str = env!("CARGO_PKG_VERSION");
66
67#[derive(Debug, Serialize)]
68pub struct Ferrix {
69 pub cpu: cpu::Processors,
70 pub ram: ram::RAM,
71 pub swaps: ram::Swaps,
72 pub dmi: dmi::DMITable,
73 pub drm: drm::Video,
74 pub sys: sys::Sys,
75 pub init: init::SystemdServices,
76}
77
78impl Ferrix {
79 pub async fn new() -> Result<Self> {
80 let conn = zbus::Connection::system().await?;
81 Ok(Self {
82 cpu: cpu::Processors::new()?,
83 ram: ram::RAM::new()?,
84 swaps: ram::Swaps::new()?,
85 dmi: dmi::DMITable::new()?,
86 drm: drm::Video::new()?,
87 sys: sys::Sys::new()?,
88 init: init::SystemdServices::new_from_connection(&conn).await?,
89 })
90 }
91
92 fn _update(&mut self) -> Result<()> {
93 self.cpu = cpu::Processors::new()?;
94 self.ram = ram::RAM::new()?;
95 self.swaps = ram::Swaps::new()?;
96 self.sys.update()?;
97
98 Ok(())
99 }
100
101 pub async fn update(&mut self, conn: &zbus::Connection) -> Result<()> {
102 self._update()?;
103 self.init = init::SystemdServices::new_from_connection(&conn).await?;
104 Ok(())
105 }
106
107 pub async fn update1(&mut self) -> Result<()> {
108 self._update()?;
109 let conn = zbus::Connection::system().await?;
110 self.init = init::SystemdServices::new_from_connection(&conn).await?;
111 Ok(())
112 }
113
114 pub fn to_json(&self) -> Result<String> {
120 Ok(serde_json::to_string(&self)?)
121 }
122
123 pub fn to_json_pretty(&self) -> Result<String> {
129 Ok(serde_json::to_string_pretty(&self)?)
130 }
131
132 pub fn to_xml(&self) -> Result<String> {
134 let xml = XMLData::from(self);
135 let data = XMLFerrixData::from(&xml);
136 data.to_xml()
137 }
138}
139
140impl ToPlainText for Ferrix {
141 fn to_plain(&self) -> String {
142 let mut s = format!("");
143 s += &self.cpu.to_plain();
144 s += &self.init.to_plain();
145
146 s
147 }
148}
149
150#[derive(Serialize)]
151struct XMLFerrixData<'a> {
152 data: &'a XMLData<'a>,
153}
154
155#[derive(Serialize)]
156struct XMLData<'a> {
157 cpu: &'a cpu::Processors,
158 ram: &'a ram::RAM,
159 dmi: dmi::DMITableXml<'a>,
160 sys: &'a sys::Sys,
161 init: &'a init::SystemdServices,
162}
163
164impl<'a> From<&'a Ferrix> for XMLData<'a> {
165 fn from(value: &'a Ferrix) -> Self {
166 Self {
167 cpu: &value.cpu,
168 ram: &value.ram,
169 dmi: dmi::DMITableXml::from(&value.dmi),
170 sys: &value.sys,
171 init: &value.init,
172 }
173 }
174}
175
176impl<'a> XMLFerrixData<'a> {
177 fn to_xml(&self) -> Result<String> {
178 Ok(xml_serde::to_string(&self)?)
179 }
180}
181
182impl<'a> From<&'a XMLData<'a>> for XMLFerrixData<'a> {
183 fn from(value: &'a XMLData) -> Self {
184 Self { data: value }
185 }
186}