1pub mod battery;
47pub mod cpu;
48pub mod dmi;
49pub mod drm;
50pub mod init;
51pub mod parts;
52pub mod ram;
53pub mod sys;
54pub mod vulnerabilities;
55pub mod cpu_freq;
56
57pub mod traits;
58pub mod utils;
59
60use crate::traits::ToPlainText;
61use anyhow::Result;
62use serde::Serialize;
63
64pub const FX_LIB_VERSION: &str = env!("CARGO_PKG_VERSION");
65
66#[derive(Debug, Serialize)]
67pub struct Ferrix {
68 pub cpu: cpu::Processors,
69 pub ram: ram::RAM,
70 pub swaps: ram::Swaps,
71 pub dmi: dmi::DMITable,
72 pub drm: drm::Video,
73 pub sys: sys::Sys,
74 pub init: init::SystemdServices,
75}
76
77impl Ferrix {
78 pub async fn new() -> Result<Self> {
79 let conn = zbus::Connection::system().await?;
80 Ok(Self {
81 cpu: cpu::Processors::new()?,
82 ram: ram::RAM::new()?,
83 swaps: ram::Swaps::new()?,
84 dmi: dmi::DMITable::new()?,
85 drm: drm::Video::new()?,
86 sys: sys::Sys::new()?,
87 init: init::SystemdServices::new_from_connection(&conn).await?,
88 })
89 }
90
91 fn _update(&mut self) -> Result<()> {
92 self.cpu = cpu::Processors::new()?;
93 self.ram = ram::RAM::new()?;
94 self.swaps = ram::Swaps::new()?;
95 self.sys.update()?;
96
97 Ok(())
98 }
99
100 pub async fn update(&mut self, conn: &zbus::Connection) -> Result<()> {
101 self._update()?;
102 self.init = init::SystemdServices::new_from_connection(&conn).await?;
103 Ok(())
104 }
105
106 pub async fn update1(&mut self) -> Result<()> {
107 self._update()?;
108 let conn = zbus::Connection::system().await?;
109 self.init = init::SystemdServices::new_from_connection(&conn).await?;
110 Ok(())
111 }
112
113 pub fn to_json(&self) -> Result<String> {
119 Ok(serde_json::to_string(&self)?)
120 }
121
122 pub fn to_json_pretty(&self) -> Result<String> {
128 Ok(serde_json::to_string_pretty(&self)?)
129 }
130
131 pub fn to_xml(&self) -> Result<String> {
133 let xml = XMLData::from(self);
134 let data = XMLFerrixData::from(&xml);
135 data.to_xml()
136 }
137}
138
139impl ToPlainText for Ferrix {
140 fn to_plain(&self) -> String {
141 let mut s = format!("");
142 s += &self.cpu.to_plain();
143 s += &self.init.to_plain();
144
145 s
146 }
147}
148
149#[derive(Serialize)]
150struct XMLFerrixData<'a> {
151 data: &'a XMLData<'a>,
152}
153
154#[derive(Serialize)]
155struct XMLData<'a> {
156 cpu: &'a cpu::Processors,
157 ram: &'a ram::RAM,
158 dmi: dmi::DMITableXml<'a>,
159 sys: &'a sys::Sys,
160 init: &'a init::SystemdServices,
161}
162
163impl<'a> From<&'a Ferrix> for XMLData<'a> {
164 fn from(value: &'a Ferrix) -> Self {
165 Self {
166 cpu: &value.cpu,
167 ram: &value.ram,
168 dmi: dmi::DMITableXml::from(&value.dmi),
169 sys: &value.sys,
170 init: &value.init,
171 }
172 }
173}
174
175impl<'a> XMLFerrixData<'a> {
176 fn to_xml(&self) -> Result<String> {
177 Ok(xml_serde::to_string(&self)?)
178 }
179}
180
181impl<'a> From<&'a XMLData<'a>> for XMLFerrixData<'a> {
182 fn from(value: &'a XMLData) -> Self {
183 Self { data: value }
184 }
185}