esp8266/gpio/
gpio_pin15.rs

1#[doc = "Register `GPIO_PIN15` reader"]
2pub struct R(crate::R<GPIO_PIN15_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<GPIO_PIN15_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<GPIO_PIN15_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<GPIO_PIN15_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `GPIO_PIN15` writer"]
17pub struct W(crate::W<GPIO_PIN15_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<GPIO_PIN15_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<GPIO_PIN15_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<GPIO_PIN15_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "Field `GPIO_PIN15_WAKEUP_ENABLE` reader - 0: disable; 1: enable GPIO wakeup CPU, only when GPIO_PIN0_INT_TYPE is 0x4 or 0x5"]
38pub struct GPIO_PIN15_WAKEUP_ENABLE_R(crate::FieldReader<bool, bool>);
39impl GPIO_PIN15_WAKEUP_ENABLE_R {
40    #[inline(always)]
41    pub(crate) fn new(bits: bool) -> Self {
42        GPIO_PIN15_WAKEUP_ENABLE_R(crate::FieldReader::new(bits))
43    }
44}
45impl core::ops::Deref for GPIO_PIN15_WAKEUP_ENABLE_R {
46    type Target = crate::FieldReader<bool, bool>;
47    #[inline(always)]
48    fn deref(&self) -> &Self::Target {
49        &self.0
50    }
51}
52#[doc = "Field `GPIO_PIN15_WAKEUP_ENABLE` writer - 0: disable; 1: enable GPIO wakeup CPU, only when GPIO_PIN0_INT_TYPE is 0x4 or 0x5"]
53pub struct GPIO_PIN15_WAKEUP_ENABLE_W<'a> {
54    w: &'a mut W,
55}
56impl<'a> GPIO_PIN15_WAKEUP_ENABLE_W<'a> {
57    #[doc = r"Sets the field bit"]
58    #[inline(always)]
59    pub fn set_bit(self) -> &'a mut W {
60        self.bit(true)
61    }
62    #[doc = r"Clears the field bit"]
63    #[inline(always)]
64    pub fn clear_bit(self) -> &'a mut W {
65        self.bit(false)
66    }
67    #[doc = r"Writes raw bits to the field"]
68    #[inline(always)]
69    pub fn bit(self, value: bool) -> &'a mut W {
70        self.w.bits = (self.w.bits & !(1 << 10)) | ((value as u32 & 1) << 10);
71        self.w
72    }
73}
74#[doc = "0: disable; 1: positive edge; 2: negative edge; 3: both types of edge; 4: low-level; 5: high-level\n\nValue on reset: 0"]
75#[derive(Clone, Copy, Debug, PartialEq)]
76#[repr(u8)]
77pub enum GPIO_PIN15_INT_TYPE_A {
78    #[doc = "0: interrupt is disabled"]
79    DISABLED = 0,
80    #[doc = "1: interrupt is triggered on the positive edge"]
81    POSITIVE_EDGE = 1,
82    #[doc = "2: interrupt is triggered on the negative edge"]
83    NEGATIVE_EDGE = 2,
84    #[doc = "3: interrupt is triggered on both edges"]
85    BOTH_EDGES = 3,
86    #[doc = "4: interrupt is triggered on the low level"]
87    LOW_LEVEL = 4,
88    #[doc = "5: interrupt is triggered on the high level"]
89    HIGH_LEVEL = 5,
90}
91impl From<GPIO_PIN15_INT_TYPE_A> for u8 {
92    #[inline(always)]
93    fn from(variant: GPIO_PIN15_INT_TYPE_A) -> Self {
94        variant as _
95    }
96}
97#[doc = "Field `GPIO_PIN15_INT_TYPE` reader - 0: disable; 1: positive edge; 2: negative edge; 3: both types of edge; 4: low-level; 5: high-level"]
98pub struct GPIO_PIN15_INT_TYPE_R(crate::FieldReader<u8, GPIO_PIN15_INT_TYPE_A>);
99impl GPIO_PIN15_INT_TYPE_R {
100    #[inline(always)]
101    pub(crate) fn new(bits: u8) -> Self {
102        GPIO_PIN15_INT_TYPE_R(crate::FieldReader::new(bits))
103    }
104    #[doc = r"Get enumerated values variant"]
105    #[inline(always)]
106    pub fn variant(&self) -> Option<GPIO_PIN15_INT_TYPE_A> {
107        match self.bits {
108            0 => Some(GPIO_PIN15_INT_TYPE_A::DISABLED),
109            1 => Some(GPIO_PIN15_INT_TYPE_A::POSITIVE_EDGE),
110            2 => Some(GPIO_PIN15_INT_TYPE_A::NEGATIVE_EDGE),
111            3 => Some(GPIO_PIN15_INT_TYPE_A::BOTH_EDGES),
112            4 => Some(GPIO_PIN15_INT_TYPE_A::LOW_LEVEL),
113            5 => Some(GPIO_PIN15_INT_TYPE_A::HIGH_LEVEL),
114            _ => None,
115        }
116    }
117    #[doc = "Checks if the value of the field is `DISABLED`"]
118    #[inline(always)]
119    pub fn is_disabled(&self) -> bool {
120        **self == GPIO_PIN15_INT_TYPE_A::DISABLED
121    }
122    #[doc = "Checks if the value of the field is `POSITIVE_EDGE`"]
123    #[inline(always)]
124    pub fn is_positive_edge(&self) -> bool {
125        **self == GPIO_PIN15_INT_TYPE_A::POSITIVE_EDGE
126    }
127    #[doc = "Checks if the value of the field is `NEGATIVE_EDGE`"]
128    #[inline(always)]
129    pub fn is_negative_edge(&self) -> bool {
130        **self == GPIO_PIN15_INT_TYPE_A::NEGATIVE_EDGE
131    }
132    #[doc = "Checks if the value of the field is `BOTH_EDGES`"]
133    #[inline(always)]
134    pub fn is_both_edges(&self) -> bool {
135        **self == GPIO_PIN15_INT_TYPE_A::BOTH_EDGES
136    }
137    #[doc = "Checks if the value of the field is `LOW_LEVEL`"]
138    #[inline(always)]
139    pub fn is_low_level(&self) -> bool {
140        **self == GPIO_PIN15_INT_TYPE_A::LOW_LEVEL
141    }
142    #[doc = "Checks if the value of the field is `HIGH_LEVEL`"]
143    #[inline(always)]
144    pub fn is_high_level(&self) -> bool {
145        **self == GPIO_PIN15_INT_TYPE_A::HIGH_LEVEL
146    }
147}
148impl core::ops::Deref for GPIO_PIN15_INT_TYPE_R {
149    type Target = crate::FieldReader<u8, GPIO_PIN15_INT_TYPE_A>;
150    #[inline(always)]
151    fn deref(&self) -> &Self::Target {
152        &self.0
153    }
154}
155#[doc = "Field `GPIO_PIN15_INT_TYPE` writer - 0: disable; 1: positive edge; 2: negative edge; 3: both types of edge; 4: low-level; 5: high-level"]
156pub struct GPIO_PIN15_INT_TYPE_W<'a> {
157    w: &'a mut W,
158}
159impl<'a> GPIO_PIN15_INT_TYPE_W<'a> {
160    #[doc = r"Writes `variant` to the field"]
161    #[inline(always)]
162    pub fn variant(self, variant: GPIO_PIN15_INT_TYPE_A) -> &'a mut W {
163        unsafe { self.bits(variant.into()) }
164    }
165    #[doc = "interrupt is disabled"]
166    #[inline(always)]
167    pub fn disabled(self) -> &'a mut W {
168        self.variant(GPIO_PIN15_INT_TYPE_A::DISABLED)
169    }
170    #[doc = "interrupt is triggered on the positive edge"]
171    #[inline(always)]
172    pub fn positive_edge(self) -> &'a mut W {
173        self.variant(GPIO_PIN15_INT_TYPE_A::POSITIVE_EDGE)
174    }
175    #[doc = "interrupt is triggered on the negative edge"]
176    #[inline(always)]
177    pub fn negative_edge(self) -> &'a mut W {
178        self.variant(GPIO_PIN15_INT_TYPE_A::NEGATIVE_EDGE)
179    }
180    #[doc = "interrupt is triggered on both edges"]
181    #[inline(always)]
182    pub fn both_edges(self) -> &'a mut W {
183        self.variant(GPIO_PIN15_INT_TYPE_A::BOTH_EDGES)
184    }
185    #[doc = "interrupt is triggered on the low level"]
186    #[inline(always)]
187    pub fn low_level(self) -> &'a mut W {
188        self.variant(GPIO_PIN15_INT_TYPE_A::LOW_LEVEL)
189    }
190    #[doc = "interrupt is triggered on the high level"]
191    #[inline(always)]
192    pub fn high_level(self) -> &'a mut W {
193        self.variant(GPIO_PIN15_INT_TYPE_A::HIGH_LEVEL)
194    }
195    #[doc = r"Writes raw bits to the field"]
196    #[inline(always)]
197    pub unsafe fn bits(self, value: u8) -> &'a mut W {
198        self.w.bits = (self.w.bits & !(7 << 7)) | ((value as u32 & 7) << 7);
199        self.w
200    }
201}
202#[doc = "1: open drain; 0: normal\n\nValue on reset: 0"]
203#[derive(Clone, Copy, Debug, PartialEq)]
204pub enum GPIO_PIN15_DRIVER_A {
205    #[doc = "0: open drain"]
206    OPEN_DRAIN = 0,
207    #[doc = "1: normal"]
208    NORMAL = 1,
209}
210impl From<GPIO_PIN15_DRIVER_A> for bool {
211    #[inline(always)]
212    fn from(variant: GPIO_PIN15_DRIVER_A) -> Self {
213        variant as u8 != 0
214    }
215}
216#[doc = "Field `GPIO_PIN15_DRIVER` reader - 1: open drain; 0: normal"]
217pub struct GPIO_PIN15_DRIVER_R(crate::FieldReader<bool, GPIO_PIN15_DRIVER_A>);
218impl GPIO_PIN15_DRIVER_R {
219    #[inline(always)]
220    pub(crate) fn new(bits: bool) -> Self {
221        GPIO_PIN15_DRIVER_R(crate::FieldReader::new(bits))
222    }
223    #[doc = r"Get enumerated values variant"]
224    #[inline(always)]
225    pub fn variant(&self) -> GPIO_PIN15_DRIVER_A {
226        match self.bits {
227            false => GPIO_PIN15_DRIVER_A::OPEN_DRAIN,
228            true => GPIO_PIN15_DRIVER_A::NORMAL,
229        }
230    }
231    #[doc = "Checks if the value of the field is `OPEN_DRAIN`"]
232    #[inline(always)]
233    pub fn is_open_drain(&self) -> bool {
234        **self == GPIO_PIN15_DRIVER_A::OPEN_DRAIN
235    }
236    #[doc = "Checks if the value of the field is `NORMAL`"]
237    #[inline(always)]
238    pub fn is_normal(&self) -> bool {
239        **self == GPIO_PIN15_DRIVER_A::NORMAL
240    }
241}
242impl core::ops::Deref for GPIO_PIN15_DRIVER_R {
243    type Target = crate::FieldReader<bool, GPIO_PIN15_DRIVER_A>;
244    #[inline(always)]
245    fn deref(&self) -> &Self::Target {
246        &self.0
247    }
248}
249#[doc = "Field `GPIO_PIN15_DRIVER` writer - 1: open drain; 0: normal"]
250pub struct GPIO_PIN15_DRIVER_W<'a> {
251    w: &'a mut W,
252}
253impl<'a> GPIO_PIN15_DRIVER_W<'a> {
254    #[doc = r"Writes `variant` to the field"]
255    #[inline(always)]
256    pub fn variant(self, variant: GPIO_PIN15_DRIVER_A) -> &'a mut W {
257        self.bit(variant.into())
258    }
259    #[doc = "open drain"]
260    #[inline(always)]
261    pub fn open_drain(self) -> &'a mut W {
262        self.variant(GPIO_PIN15_DRIVER_A::OPEN_DRAIN)
263    }
264    #[doc = "normal"]
265    #[inline(always)]
266    pub fn normal(self) -> &'a mut W {
267        self.variant(GPIO_PIN15_DRIVER_A::NORMAL)
268    }
269    #[doc = r"Sets the field bit"]
270    #[inline(always)]
271    pub fn set_bit(self) -> &'a mut W {
272        self.bit(true)
273    }
274    #[doc = r"Clears the field bit"]
275    #[inline(always)]
276    pub fn clear_bit(self) -> &'a mut W {
277        self.bit(false)
278    }
279    #[doc = r"Writes raw bits to the field"]
280    #[inline(always)]
281    pub fn bit(self, value: bool) -> &'a mut W {
282        self.w.bits = (self.w.bits & !(1 << 2)) | ((value as u32 & 1) << 2);
283        self.w
284    }
285}
286#[doc = "1: sigma-delta; 0: GPIO_DATA\n\nValue on reset: 0"]
287#[derive(Clone, Copy, Debug, PartialEq)]
288pub enum GPIO_PIN15_SOURCE_A {
289    #[doc = "0: sigma-delta"]
290    SIGMA_DELTA = 0,
291    #[doc = "1: gpio data"]
292    GPIO_DATA = 1,
293}
294impl From<GPIO_PIN15_SOURCE_A> for bool {
295    #[inline(always)]
296    fn from(variant: GPIO_PIN15_SOURCE_A) -> Self {
297        variant as u8 != 0
298    }
299}
300#[doc = "Field `GPIO_PIN15_SOURCE` reader - 1: sigma-delta; 0: GPIO_DATA"]
301pub struct GPIO_PIN15_SOURCE_R(crate::FieldReader<bool, GPIO_PIN15_SOURCE_A>);
302impl GPIO_PIN15_SOURCE_R {
303    #[inline(always)]
304    pub(crate) fn new(bits: bool) -> Self {
305        GPIO_PIN15_SOURCE_R(crate::FieldReader::new(bits))
306    }
307    #[doc = r"Get enumerated values variant"]
308    #[inline(always)]
309    pub fn variant(&self) -> GPIO_PIN15_SOURCE_A {
310        match self.bits {
311            false => GPIO_PIN15_SOURCE_A::SIGMA_DELTA,
312            true => GPIO_PIN15_SOURCE_A::GPIO_DATA,
313        }
314    }
315    #[doc = "Checks if the value of the field is `SIGMA_DELTA`"]
316    #[inline(always)]
317    pub fn is_sigma_delta(&self) -> bool {
318        **self == GPIO_PIN15_SOURCE_A::SIGMA_DELTA
319    }
320    #[doc = "Checks if the value of the field is `GPIO_DATA`"]
321    #[inline(always)]
322    pub fn is_gpio_data(&self) -> bool {
323        **self == GPIO_PIN15_SOURCE_A::GPIO_DATA
324    }
325}
326impl core::ops::Deref for GPIO_PIN15_SOURCE_R {
327    type Target = crate::FieldReader<bool, GPIO_PIN15_SOURCE_A>;
328    #[inline(always)]
329    fn deref(&self) -> &Self::Target {
330        &self.0
331    }
332}
333#[doc = "Field `GPIO_PIN15_SOURCE` writer - 1: sigma-delta; 0: GPIO_DATA"]
334pub struct GPIO_PIN15_SOURCE_W<'a> {
335    w: &'a mut W,
336}
337impl<'a> GPIO_PIN15_SOURCE_W<'a> {
338    #[doc = r"Writes `variant` to the field"]
339    #[inline(always)]
340    pub fn variant(self, variant: GPIO_PIN15_SOURCE_A) -> &'a mut W {
341        self.bit(variant.into())
342    }
343    #[doc = "sigma-delta"]
344    #[inline(always)]
345    pub fn sigma_delta(self) -> &'a mut W {
346        self.variant(GPIO_PIN15_SOURCE_A::SIGMA_DELTA)
347    }
348    #[doc = "gpio data"]
349    #[inline(always)]
350    pub fn gpio_data(self) -> &'a mut W {
351        self.variant(GPIO_PIN15_SOURCE_A::GPIO_DATA)
352    }
353    #[doc = r"Sets the field bit"]
354    #[inline(always)]
355    pub fn set_bit(self) -> &'a mut W {
356        self.bit(true)
357    }
358    #[doc = r"Clears the field bit"]
359    #[inline(always)]
360    pub fn clear_bit(self) -> &'a mut W {
361        self.bit(false)
362    }
363    #[doc = r"Writes raw bits to the field"]
364    #[inline(always)]
365    pub fn bit(self, value: bool) -> &'a mut W {
366        self.w.bits = (self.w.bits & !1) | (value as u32 & 1);
367        self.w
368    }
369}
370impl R {
371    #[doc = "Bit 10 - 0: disable; 1: enable GPIO wakeup CPU, only when GPIO_PIN0_INT_TYPE is 0x4 or 0x5"]
372    #[inline(always)]
373    pub fn gpio_pin15_wakeup_enable(&self) -> GPIO_PIN15_WAKEUP_ENABLE_R {
374        GPIO_PIN15_WAKEUP_ENABLE_R::new(((self.bits >> 10) & 1) != 0)
375    }
376    #[doc = "Bits 7:9 - 0: disable; 1: positive edge; 2: negative edge; 3: both types of edge; 4: low-level; 5: high-level"]
377    #[inline(always)]
378    pub fn gpio_pin15_int_type(&self) -> GPIO_PIN15_INT_TYPE_R {
379        GPIO_PIN15_INT_TYPE_R::new(((self.bits >> 7) & 7) as u8)
380    }
381    #[doc = "Bit 2 - 1: open drain; 0: normal"]
382    #[inline(always)]
383    pub fn gpio_pin15_driver(&self) -> GPIO_PIN15_DRIVER_R {
384        GPIO_PIN15_DRIVER_R::new(((self.bits >> 2) & 1) != 0)
385    }
386    #[doc = "Bit 0 - 1: sigma-delta; 0: GPIO_DATA"]
387    #[inline(always)]
388    pub fn gpio_pin15_source(&self) -> GPIO_PIN15_SOURCE_R {
389        GPIO_PIN15_SOURCE_R::new((self.bits & 1) != 0)
390    }
391}
392impl W {
393    #[doc = "Bit 10 - 0: disable; 1: enable GPIO wakeup CPU, only when GPIO_PIN0_INT_TYPE is 0x4 or 0x5"]
394    #[inline(always)]
395    pub fn gpio_pin15_wakeup_enable(&mut self) -> GPIO_PIN15_WAKEUP_ENABLE_W {
396        GPIO_PIN15_WAKEUP_ENABLE_W { w: self }
397    }
398    #[doc = "Bits 7:9 - 0: disable; 1: positive edge; 2: negative edge; 3: both types of edge; 4: low-level; 5: high-level"]
399    #[inline(always)]
400    pub fn gpio_pin15_int_type(&mut self) -> GPIO_PIN15_INT_TYPE_W {
401        GPIO_PIN15_INT_TYPE_W { w: self }
402    }
403    #[doc = "Bit 2 - 1: open drain; 0: normal"]
404    #[inline(always)]
405    pub fn gpio_pin15_driver(&mut self) -> GPIO_PIN15_DRIVER_W {
406        GPIO_PIN15_DRIVER_W { w: self }
407    }
408    #[doc = "Bit 0 - 1: sigma-delta; 0: GPIO_DATA"]
409    #[inline(always)]
410    pub fn gpio_pin15_source(&mut self) -> GPIO_PIN15_SOURCE_W {
411        GPIO_PIN15_SOURCE_W { w: self }
412    }
413    #[doc = "Writes raw bits to the register."]
414    #[inline(always)]
415    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
416        self.0.bits(bits);
417        self
418    }
419}
420#[doc = "GPIO_PIN15\n\nThis register you can [`read`]
421(crate::generic::Reg::read), [`write_with_zero`]
422(crate::generic::Reg::write_with_zero), [`reset`]
423(crate::generic::Reg::reset), [`write`]
424(crate::generic::Reg::write), [`modify`]
425(crate::generic::Reg::modify). See [API]
426(https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [gpio_pin15]
427(index.html) module"]
428pub struct GPIO_PIN15_SPEC;
429impl crate::RegisterSpec for GPIO_PIN15_SPEC {
430    type Ux = u32;
431}
432#[doc = "`read()` method returns [gpio_pin15::R]
433(R) reader structure"]
434impl crate::Readable for GPIO_PIN15_SPEC {
435    type Reader = R;
436}
437#[doc = "`write(|w| ..)` method takes [gpio_pin15::W]
438(W) writer structure"]
439impl crate::Writable for GPIO_PIN15_SPEC {
440    type Writer = W;
441}
442#[doc = "`reset()` method sets GPIO_PIN15 to value 0"]
443impl crate::Resettable for GPIO_PIN15_SPEC {
444    #[inline(always)]
445    fn reset_value() -> Self::Ux {
446        0
447    }
448}
esp8266/gpio/gpio_pin15.rs

esp8266/gpio/
gpio_pin15.rs
