esp8266/uart0/
uart_int_raw.rs1#[doc = "Register `UART_INT_RAW` reader"]
2pub struct R(crate::R<UART_INT_RAW_SPEC>);
3impl core::ops::Deref for R {
4 type Target = crate::R<UART_INT_RAW_SPEC>;
5 #[inline(always)]
6 fn deref(&self) -> &Self::Target {
7 &self.0
8 }
9}
10impl From<crate::R<UART_INT_RAW_SPEC>> for R {
11 #[inline(always)]
12 fn from(reader: crate::R<UART_INT_RAW_SPEC>) -> Self {
13 R(reader)
14 }
15}
16#[doc = "Field `rxfifo_tout_int_raw` reader - The interrupt raw bit for Rx time-out interrupt(depands on theUART_RX_TOUT_THRHD)"]
17pub struct RXFIFO_TOUT_INT_RAW_R(crate::FieldReader<bool, bool>);
18impl RXFIFO_TOUT_INT_RAW_R {
19 #[inline(always)]
20 pub(crate) fn new(bits: bool) -> Self {
21 RXFIFO_TOUT_INT_RAW_R(crate::FieldReader::new(bits))
22 }
23}
24impl core::ops::Deref for RXFIFO_TOUT_INT_RAW_R {
25 type Target = crate::FieldReader<bool, bool>;
26 #[inline(always)]
27 fn deref(&self) -> &Self::Target {
28 &self.0
29 }
30}
31#[doc = "Field `brk_det_int_raw` reader - The interrupt raw bit for Rx byte start error"]
32pub struct BRK_DET_INT_RAW_R(crate::FieldReader<bool, bool>);
33impl BRK_DET_INT_RAW_R {
34 #[inline(always)]
35 pub(crate) fn new(bits: bool) -> Self {
36 BRK_DET_INT_RAW_R(crate::FieldReader::new(bits))
37 }
38}
39impl core::ops::Deref for BRK_DET_INT_RAW_R {
40 type Target = crate::FieldReader<bool, bool>;
41 #[inline(always)]
42 fn deref(&self) -> &Self::Target {
43 &self.0
44 }
45}
46#[doc = "Field `cts_chg_int_raw` reader - The interrupt raw bit for CTS changing level"]
47pub struct CTS_CHG_INT_RAW_R(crate::FieldReader<bool, bool>);
48impl CTS_CHG_INT_RAW_R {
49 #[inline(always)]
50 pub(crate) fn new(bits: bool) -> Self {
51 CTS_CHG_INT_RAW_R(crate::FieldReader::new(bits))
52 }
53}
54impl core::ops::Deref for CTS_CHG_INT_RAW_R {
55 type Target = crate::FieldReader<bool, bool>;
56 #[inline(always)]
57 fn deref(&self) -> &Self::Target {
58 &self.0
59 }
60}
61#[doc = "Field `dsr_chg_int_raw` reader - The interrupt raw bit for DSR changing level"]
62pub struct DSR_CHG_INT_RAW_R(crate::FieldReader<bool, bool>);
63impl DSR_CHG_INT_RAW_R {
64 #[inline(always)]
65 pub(crate) fn new(bits: bool) -> Self {
66 DSR_CHG_INT_RAW_R(crate::FieldReader::new(bits))
67 }
68}
69impl core::ops::Deref for DSR_CHG_INT_RAW_R {
70 type Target = crate::FieldReader<bool, bool>;
71 #[inline(always)]
72 fn deref(&self) -> &Self::Target {
73 &self.0
74 }
75}
76#[doc = "Field `rxfifo_ovf_int_raw` reader - The interrupt raw bit for rx fifo overflow"]
77pub struct RXFIFO_OVF_INT_RAW_R(crate::FieldReader<bool, bool>);
78impl RXFIFO_OVF_INT_RAW_R {
79 #[inline(always)]
80 pub(crate) fn new(bits: bool) -> Self {
81 RXFIFO_OVF_INT_RAW_R(crate::FieldReader::new(bits))
82 }
83}
84impl core::ops::Deref for RXFIFO_OVF_INT_RAW_R {
85 type Target = crate::FieldReader<bool, bool>;
86 #[inline(always)]
87 fn deref(&self) -> &Self::Target {
88 &self.0
89 }
90}
91#[doc = "Field `frm_err_int_raw` reader - The interrupt raw bit for other rx error"]
92pub struct FRM_ERR_INT_RAW_R(crate::FieldReader<bool, bool>);
93impl FRM_ERR_INT_RAW_R {
94 #[inline(always)]
95 pub(crate) fn new(bits: bool) -> Self {
96 FRM_ERR_INT_RAW_R(crate::FieldReader::new(bits))
97 }
98}
99impl core::ops::Deref for FRM_ERR_INT_RAW_R {
100 type Target = crate::FieldReader<bool, bool>;
101 #[inline(always)]
102 fn deref(&self) -> &Self::Target {
103 &self.0
104 }
105}
106#[doc = "Field `parity_err_int_raw` reader - The interrupt raw bit for parity check error"]
107pub struct PARITY_ERR_INT_RAW_R(crate::FieldReader<bool, bool>);
108impl PARITY_ERR_INT_RAW_R {
109 #[inline(always)]
110 pub(crate) fn new(bits: bool) -> Self {
111 PARITY_ERR_INT_RAW_R(crate::FieldReader::new(bits))
112 }
113}
114impl core::ops::Deref for PARITY_ERR_INT_RAW_R {
115 type Target = crate::FieldReader<bool, bool>;
116 #[inline(always)]
117 fn deref(&self) -> &Self::Target {
118 &self.0
119 }
120}
121#[doc = "Field `txfifo_empty_int_raw` reader - The interrupt raw bit for tx fifo empty interrupt(depands onUART_TXFIFO_EMPTY_THRHD bits)"]
122pub struct TXFIFO_EMPTY_INT_RAW_R(crate::FieldReader<bool, bool>);
123impl TXFIFO_EMPTY_INT_RAW_R {
124 #[inline(always)]
125 pub(crate) fn new(bits: bool) -> Self {
126 TXFIFO_EMPTY_INT_RAW_R(crate::FieldReader::new(bits))
127 }
128}
129impl core::ops::Deref for TXFIFO_EMPTY_INT_RAW_R {
130 type Target = crate::FieldReader<bool, bool>;
131 #[inline(always)]
132 fn deref(&self) -> &Self::Target {
133 &self.0
134 }
135}
136#[doc = "Field `rxfifo_full_int_raw` reader - The interrupt raw bit for rx fifo full interrupt(depands onUART_RXFIFO_FULL_THRHD bits)"]
137pub struct RXFIFO_FULL_INT_RAW_R(crate::FieldReader<bool, bool>);
138impl RXFIFO_FULL_INT_RAW_R {
139 #[inline(always)]
140 pub(crate) fn new(bits: bool) -> Self {
141 RXFIFO_FULL_INT_RAW_R(crate::FieldReader::new(bits))
142 }
143}
144impl core::ops::Deref for RXFIFO_FULL_INT_RAW_R {
145 type Target = crate::FieldReader<bool, bool>;
146 #[inline(always)]
147 fn deref(&self) -> &Self::Target {
148 &self.0
149 }
150}
151impl R {
152 #[doc = "Bit 8 - The interrupt raw bit for Rx time-out interrupt(depands on theUART_RX_TOUT_THRHD)"]
153 #[inline(always)]
154 pub fn rxfifo_tout_int_raw(&self) -> RXFIFO_TOUT_INT_RAW_R {
155 RXFIFO_TOUT_INT_RAW_R::new(((self.bits >> 8) & 1) != 0)
156 }
157 #[doc = "Bit 7 - The interrupt raw bit for Rx byte start error"]
158 #[inline(always)]
159 pub fn brk_det_int_raw(&self) -> BRK_DET_INT_RAW_R {
160 BRK_DET_INT_RAW_R::new(((self.bits >> 7) & 1) != 0)
161 }
162 #[doc = "Bit 6 - The interrupt raw bit for CTS changing level"]
163 #[inline(always)]
164 pub fn cts_chg_int_raw(&self) -> CTS_CHG_INT_RAW_R {
165 CTS_CHG_INT_RAW_R::new(((self.bits >> 6) & 1) != 0)
166 }
167 #[doc = "Bit 5 - The interrupt raw bit for DSR changing level"]
168 #[inline(always)]
169 pub fn dsr_chg_int_raw(&self) -> DSR_CHG_INT_RAW_R {
170 DSR_CHG_INT_RAW_R::new(((self.bits >> 5) & 1) != 0)
171 }
172 #[doc = "Bit 4 - The interrupt raw bit for rx fifo overflow"]
173 #[inline(always)]
174 pub fn rxfifo_ovf_int_raw(&self) -> RXFIFO_OVF_INT_RAW_R {
175 RXFIFO_OVF_INT_RAW_R::new(((self.bits >> 4) & 1) != 0)
176 }
177 #[doc = "Bit 3 - The interrupt raw bit for other rx error"]
178 #[inline(always)]
179 pub fn frm_err_int_raw(&self) -> FRM_ERR_INT_RAW_R {
180 FRM_ERR_INT_RAW_R::new(((self.bits >> 3) & 1) != 0)
181 }
182 #[doc = "Bit 2 - The interrupt raw bit for parity check error"]
183 #[inline(always)]
184 pub fn parity_err_int_raw(&self) -> PARITY_ERR_INT_RAW_R {
185 PARITY_ERR_INT_RAW_R::new(((self.bits >> 2) & 1) != 0)
186 }
187 #[doc = "Bit 1 - The interrupt raw bit for tx fifo empty interrupt(depands onUART_TXFIFO_EMPTY_THRHD bits)"]
188 #[inline(always)]
189 pub fn txfifo_empty_int_raw(&self) -> TXFIFO_EMPTY_INT_RAW_R {
190 TXFIFO_EMPTY_INT_RAW_R::new(((self.bits >> 1) & 1) != 0)
191 }
192 #[doc = "Bit 0 - The interrupt raw bit for rx fifo full interrupt(depands onUART_RXFIFO_FULL_THRHD bits)"]
193 #[inline(always)]
194 pub fn rxfifo_full_int_raw(&self) -> RXFIFO_FULL_INT_RAW_R {
195 RXFIFO_FULL_INT_RAW_R::new((self.bits & 1) != 0)
196 }
197}
198#[doc = "UART INTERRUPT RAW STATE\n\nThis register you can [`read`]
199(crate::generic::Reg::read). See [API]
200(https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [uart_int_raw]
201(index.html) module"]
202pub struct UART_INT_RAW_SPEC;
203impl crate::RegisterSpec for UART_INT_RAW_SPEC {
204 type Ux = u32;
205}
206#[doc = "`read()` method returns [uart_int_raw::R]
207(R) reader structure"]
208impl crate::Readable for UART_INT_RAW_SPEC {
209 type Reader = R;
210}
211#[doc = "`reset()` method sets UART_INT_RAW to value 0"]
212impl crate::Resettable for UART_INT_RAW_SPEC {
213 #[inline(always)]
214 fn reset_value() -> Self::Ux {
215 0
216 }
217}