#[doc = "Register `I2STIMING` reader"]
pub struct R(crate::R<I2STIMING_SPEC>);
impl core::ops::Deref for R {
type Target = crate::R<I2STIMING_SPEC>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
impl From<crate::R<I2STIMING_SPEC>> for R {
#[inline(always)]
fn from(reader: crate::R<I2STIMING_SPEC>) -> Self {
R(reader)
}
}
#[doc = "Register `I2STIMING` writer"]
pub struct W(crate::W<I2STIMING_SPEC>);
impl core::ops::Deref for W {
type Target = crate::W<I2STIMING_SPEC>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
impl core::ops::DerefMut for W {
#[inline(always)]
fn deref_mut(&mut self) -> &mut Self::Target {
&mut self.0
}
}
impl From<crate::W<I2STIMING_SPEC>> for W {
#[inline(always)]
fn from(writer: crate::W<I2STIMING_SPEC>) -> Self {
W(writer)
}
}
#[doc = "Field `I2S_TRANS_BCK_IN_INV` reader - "]
pub struct I2S_TRANS_BCK_IN_INV_R(crate::FieldReader<bool, bool>);
impl I2S_TRANS_BCK_IN_INV_R {
#[inline(always)]
pub(crate) fn new(bits: bool) -> Self {
I2S_TRANS_BCK_IN_INV_R(crate::FieldReader::new(bits))
}
}
impl core::ops::Deref for I2S_TRANS_BCK_IN_INV_R {
type Target = crate::FieldReader<bool, bool>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
#[doc = "Field `I2S_TRANS_BCK_IN_INV` writer - "]
pub struct I2S_TRANS_BCK_IN_INV_W<'a> {
w: &'a mut W,
}
impl<'a> I2S_TRANS_BCK_IN_INV_W<'a> {
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(1 << 22)) | ((value as u32 & 1) << 22);
self.w
}
}
#[doc = "Field `I2S_RECE_DSYNC_SW` reader - "]
pub struct I2S_RECE_DSYNC_SW_R(crate::FieldReader<bool, bool>);
impl I2S_RECE_DSYNC_SW_R {
#[inline(always)]
pub(crate) fn new(bits: bool) -> Self {
I2S_RECE_DSYNC_SW_R(crate::FieldReader::new(bits))
}
}
impl core::ops::Deref for I2S_RECE_DSYNC_SW_R {
type Target = crate::FieldReader<bool, bool>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
#[doc = "Field `I2S_RECE_DSYNC_SW` writer - "]
pub struct I2S_RECE_DSYNC_SW_W<'a> {
w: &'a mut W,
}
impl<'a> I2S_RECE_DSYNC_SW_W<'a> {
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(1 << 21)) | ((value as u32 & 1) << 21);
self.w
}
}
#[doc = "Field `I2S_TRANS_DSYNC_SW` reader - "]
pub struct I2S_TRANS_DSYNC_SW_R(crate::FieldReader<bool, bool>);
impl I2S_TRANS_DSYNC_SW_R {
#[inline(always)]
pub(crate) fn new(bits: bool) -> Self {
I2S_TRANS_DSYNC_SW_R(crate::FieldReader::new(bits))
}
}
impl core::ops::Deref for I2S_TRANS_DSYNC_SW_R {
type Target = crate::FieldReader<bool, bool>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
#[doc = "Field `I2S_TRANS_DSYNC_SW` writer - "]
pub struct I2S_TRANS_DSYNC_SW_W<'a> {
w: &'a mut W,
}
impl<'a> I2S_TRANS_DSYNC_SW_W<'a> {
#[doc = r"Sets the field bit"]
#[inline(always)]
pub fn set_bit(self) -> &'a mut W {
self.bit(true)
}
#[doc = r"Clears the field bit"]
#[inline(always)]
pub fn clear_bit(self) -> &'a mut W {
self.bit(false)
}
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub fn bit(self, value: bool) -> &'a mut W {
self.w.bits = (self.w.bits & !(1 << 20)) | ((value as u32 & 1) << 20);
self.w
}
}
#[doc = "Field `I2S_RECE_BCK_OUT_DELAY` reader - "]
pub struct I2S_RECE_BCK_OUT_DELAY_R(crate::FieldReader<u8, u8>);
impl I2S_RECE_BCK_OUT_DELAY_R {
#[inline(always)]
pub(crate) fn new(bits: u8) -> Self {
I2S_RECE_BCK_OUT_DELAY_R(crate::FieldReader::new(bits))
}
}
impl core::ops::Deref for I2S_RECE_BCK_OUT_DELAY_R {
type Target = crate::FieldReader<u8, u8>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
#[doc = "Field `I2S_RECE_BCK_OUT_DELAY` writer - "]
pub struct I2S_RECE_BCK_OUT_DELAY_W<'a> {
w: &'a mut W,
}
impl<'a> I2S_RECE_BCK_OUT_DELAY_W<'a> {
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub unsafe fn bits(self, value: u8) -> &'a mut W {
self.w.bits = (self.w.bits & !(3 << 18)) | ((value as u32 & 3) << 18);
self.w
}
}
#[doc = "Field `I2S_RECE_WS_OUT_DELAY` reader - "]
pub struct I2S_RECE_WS_OUT_DELAY_R(crate::FieldReader<u8, u8>);
impl I2S_RECE_WS_OUT_DELAY_R {
#[inline(always)]
pub(crate) fn new(bits: u8) -> Self {
I2S_RECE_WS_OUT_DELAY_R(crate::FieldReader::new(bits))
}
}
impl core::ops::Deref for I2S_RECE_WS_OUT_DELAY_R {
type Target = crate::FieldReader<u8, u8>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
#[doc = "Field `I2S_RECE_WS_OUT_DELAY` writer - "]
pub struct I2S_RECE_WS_OUT_DELAY_W<'a> {
w: &'a mut W,
}
impl<'a> I2S_RECE_WS_OUT_DELAY_W<'a> {
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub unsafe fn bits(self, value: u8) -> &'a mut W {
self.w.bits = (self.w.bits & !(3 << 16)) | ((value as u32 & 3) << 16);
self.w
}
}
#[doc = "Field `I2S_TRANS_SD_OUT_DELAY` reader - "]
pub struct I2S_TRANS_SD_OUT_DELAY_R(crate::FieldReader<u8, u8>);
impl I2S_TRANS_SD_OUT_DELAY_R {
#[inline(always)]
pub(crate) fn new(bits: u8) -> Self {
I2S_TRANS_SD_OUT_DELAY_R(crate::FieldReader::new(bits))
}
}
impl core::ops::Deref for I2S_TRANS_SD_OUT_DELAY_R {
type Target = crate::FieldReader<u8, u8>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
#[doc = "Field `I2S_TRANS_SD_OUT_DELAY` writer - "]
pub struct I2S_TRANS_SD_OUT_DELAY_W<'a> {
w: &'a mut W,
}
impl<'a> I2S_TRANS_SD_OUT_DELAY_W<'a> {
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub unsafe fn bits(self, value: u8) -> &'a mut W {
self.w.bits = (self.w.bits & !(3 << 14)) | ((value as u32 & 3) << 14);
self.w
}
}
#[doc = "Field `I2S_TRANS_WS_OUT_DELAY` reader - "]
pub struct I2S_TRANS_WS_OUT_DELAY_R(crate::FieldReader<u8, u8>);
impl I2S_TRANS_WS_OUT_DELAY_R {
#[inline(always)]
pub(crate) fn new(bits: u8) -> Self {
I2S_TRANS_WS_OUT_DELAY_R(crate::FieldReader::new(bits))
}
}
impl core::ops::Deref for I2S_TRANS_WS_OUT_DELAY_R {
type Target = crate::FieldReader<u8, u8>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
#[doc = "Field `I2S_TRANS_WS_OUT_DELAY` writer - "]
pub struct I2S_TRANS_WS_OUT_DELAY_W<'a> {
w: &'a mut W,
}
impl<'a> I2S_TRANS_WS_OUT_DELAY_W<'a> {
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub unsafe fn bits(self, value: u8) -> &'a mut W {
self.w.bits = (self.w.bits & !(3 << 12)) | ((value as u32 & 3) << 12);
self.w
}
}
#[doc = "Field `I2S_TRANS_BCK_OUT_DELAY` reader - "]
pub struct I2S_TRANS_BCK_OUT_DELAY_R(crate::FieldReader<u8, u8>);
impl I2S_TRANS_BCK_OUT_DELAY_R {
#[inline(always)]
pub(crate) fn new(bits: u8) -> Self {
I2S_TRANS_BCK_OUT_DELAY_R(crate::FieldReader::new(bits))
}
}
impl core::ops::Deref for I2S_TRANS_BCK_OUT_DELAY_R {
type Target = crate::FieldReader<u8, u8>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
#[doc = "Field `I2S_TRANS_BCK_OUT_DELAY` writer - "]
pub struct I2S_TRANS_BCK_OUT_DELAY_W<'a> {
w: &'a mut W,
}
impl<'a> I2S_TRANS_BCK_OUT_DELAY_W<'a> {
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub unsafe fn bits(self, value: u8) -> &'a mut W {
self.w.bits = (self.w.bits & !(3 << 10)) | ((value as u32 & 3) << 10);
self.w
}
}
#[doc = "Field `I2S_RECE_SD_IN_DELAY` reader - "]
pub struct I2S_RECE_SD_IN_DELAY_R(crate::FieldReader<u8, u8>);
impl I2S_RECE_SD_IN_DELAY_R {
#[inline(always)]
pub(crate) fn new(bits: u8) -> Self {
I2S_RECE_SD_IN_DELAY_R(crate::FieldReader::new(bits))
}
}
impl core::ops::Deref for I2S_RECE_SD_IN_DELAY_R {
type Target = crate::FieldReader<u8, u8>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
#[doc = "Field `I2S_RECE_SD_IN_DELAY` writer - "]
pub struct I2S_RECE_SD_IN_DELAY_W<'a> {
w: &'a mut W,
}
impl<'a> I2S_RECE_SD_IN_DELAY_W<'a> {
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub unsafe fn bits(self, value: u8) -> &'a mut W {
self.w.bits = (self.w.bits & !(3 << 8)) | ((value as u32 & 3) << 8);
self.w
}
}
#[doc = "Field `I2S_RECE_WS_IN_DELAY` reader - "]
pub struct I2S_RECE_WS_IN_DELAY_R(crate::FieldReader<u8, u8>);
impl I2S_RECE_WS_IN_DELAY_R {
#[inline(always)]
pub(crate) fn new(bits: u8) -> Self {
I2S_RECE_WS_IN_DELAY_R(crate::FieldReader::new(bits))
}
}
impl core::ops::Deref for I2S_RECE_WS_IN_DELAY_R {
type Target = crate::FieldReader<u8, u8>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
#[doc = "Field `I2S_RECE_WS_IN_DELAY` writer - "]
pub struct I2S_RECE_WS_IN_DELAY_W<'a> {
w: &'a mut W,
}
impl<'a> I2S_RECE_WS_IN_DELAY_W<'a> {
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub unsafe fn bits(self, value: u8) -> &'a mut W {
self.w.bits = (self.w.bits & !(3 << 6)) | ((value as u32 & 3) << 6);
self.w
}
}
#[doc = "Field `I2S_RECE_BCK_IN_DELAY` reader - "]
pub struct I2S_RECE_BCK_IN_DELAY_R(crate::FieldReader<u8, u8>);
impl I2S_RECE_BCK_IN_DELAY_R {
#[inline(always)]
pub(crate) fn new(bits: u8) -> Self {
I2S_RECE_BCK_IN_DELAY_R(crate::FieldReader::new(bits))
}
}
impl core::ops::Deref for I2S_RECE_BCK_IN_DELAY_R {
type Target = crate::FieldReader<u8, u8>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
#[doc = "Field `I2S_RECE_BCK_IN_DELAY` writer - "]
pub struct I2S_RECE_BCK_IN_DELAY_W<'a> {
w: &'a mut W,
}
impl<'a> I2S_RECE_BCK_IN_DELAY_W<'a> {
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub unsafe fn bits(self, value: u8) -> &'a mut W {
self.w.bits = (self.w.bits & !(3 << 4)) | ((value as u32 & 3) << 4);
self.w
}
}
#[doc = "Field `I2S_TRANS_WS_IN_DELAY` reader - "]
pub struct I2S_TRANS_WS_IN_DELAY_R(crate::FieldReader<u8, u8>);
impl I2S_TRANS_WS_IN_DELAY_R {
#[inline(always)]
pub(crate) fn new(bits: u8) -> Self {
I2S_TRANS_WS_IN_DELAY_R(crate::FieldReader::new(bits))
}
}
impl core::ops::Deref for I2S_TRANS_WS_IN_DELAY_R {
type Target = crate::FieldReader<u8, u8>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
#[doc = "Field `I2S_TRANS_WS_IN_DELAY` writer - "]
pub struct I2S_TRANS_WS_IN_DELAY_W<'a> {
w: &'a mut W,
}
impl<'a> I2S_TRANS_WS_IN_DELAY_W<'a> {
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub unsafe fn bits(self, value: u8) -> &'a mut W {
self.w.bits = (self.w.bits & !(3 << 2)) | ((value as u32 & 3) << 2);
self.w
}
}
#[doc = "Field `I2S_TRANS_BCK_IN_DELAY` reader - "]
pub struct I2S_TRANS_BCK_IN_DELAY_R(crate::FieldReader<u8, u8>);
impl I2S_TRANS_BCK_IN_DELAY_R {
#[inline(always)]
pub(crate) fn new(bits: u8) -> Self {
I2S_TRANS_BCK_IN_DELAY_R(crate::FieldReader::new(bits))
}
}
impl core::ops::Deref for I2S_TRANS_BCK_IN_DELAY_R {
type Target = crate::FieldReader<u8, u8>;
#[inline(always)]
fn deref(&self) -> &Self::Target {
&self.0
}
}
#[doc = "Field `I2S_TRANS_BCK_IN_DELAY` writer - "]
pub struct I2S_TRANS_BCK_IN_DELAY_W<'a> {
w: &'a mut W,
}
impl<'a> I2S_TRANS_BCK_IN_DELAY_W<'a> {
#[doc = r"Writes raw bits to the field"]
#[inline(always)]
pub unsafe fn bits(self, value: u8) -> &'a mut W {
self.w.bits = (self.w.bits & !3) | (value as u32 & 3);
self.w
}
}
impl R {
#[doc = "Bit 22"]
#[inline(always)]
pub fn i2s_trans_bck_in_inv(&self) -> I2S_TRANS_BCK_IN_INV_R {
I2S_TRANS_BCK_IN_INV_R::new(((self.bits >> 22) & 1) != 0)
}
#[doc = "Bit 21"]
#[inline(always)]
pub fn i2s_rece_dsync_sw(&self) -> I2S_RECE_DSYNC_SW_R {
I2S_RECE_DSYNC_SW_R::new(((self.bits >> 21) & 1) != 0)
}
#[doc = "Bit 20"]
#[inline(always)]
pub fn i2s_trans_dsync_sw(&self) -> I2S_TRANS_DSYNC_SW_R {
I2S_TRANS_DSYNC_SW_R::new(((self.bits >> 20) & 1) != 0)
}
#[doc = "Bits 18:19"]
#[inline(always)]
pub fn i2s_rece_bck_out_delay(&self) -> I2S_RECE_BCK_OUT_DELAY_R {
I2S_RECE_BCK_OUT_DELAY_R::new(((self.bits >> 18) & 3) as u8)
}
#[doc = "Bits 16:17"]
#[inline(always)]
pub fn i2s_rece_ws_out_delay(&self) -> I2S_RECE_WS_OUT_DELAY_R {
I2S_RECE_WS_OUT_DELAY_R::new(((self.bits >> 16) & 3) as u8)
}
#[doc = "Bits 14:15"]
#[inline(always)]
pub fn i2s_trans_sd_out_delay(&self) -> I2S_TRANS_SD_OUT_DELAY_R {
I2S_TRANS_SD_OUT_DELAY_R::new(((self.bits >> 14) & 3) as u8)
}
#[doc = "Bits 12:13"]
#[inline(always)]
pub fn i2s_trans_ws_out_delay(&self) -> I2S_TRANS_WS_OUT_DELAY_R {
I2S_TRANS_WS_OUT_DELAY_R::new(((self.bits >> 12) & 3) as u8)
}
#[doc = "Bits 10:11"]
#[inline(always)]
pub fn i2s_trans_bck_out_delay(&self) -> I2S_TRANS_BCK_OUT_DELAY_R {
I2S_TRANS_BCK_OUT_DELAY_R::new(((self.bits >> 10) & 3) as u8)
}
#[doc = "Bits 8:9"]
#[inline(always)]
pub fn i2s_rece_sd_in_delay(&self) -> I2S_RECE_SD_IN_DELAY_R {
I2S_RECE_SD_IN_DELAY_R::new(((self.bits >> 8) & 3) as u8)
}
#[doc = "Bits 6:7"]
#[inline(always)]
pub fn i2s_rece_ws_in_delay(&self) -> I2S_RECE_WS_IN_DELAY_R {
I2S_RECE_WS_IN_DELAY_R::new(((self.bits >> 6) & 3) as u8)
}
#[doc = "Bits 4:5"]
#[inline(always)]
pub fn i2s_rece_bck_in_delay(&self) -> I2S_RECE_BCK_IN_DELAY_R {
I2S_RECE_BCK_IN_DELAY_R::new(((self.bits >> 4) & 3) as u8)
}
#[doc = "Bits 2:3"]
#[inline(always)]
pub fn i2s_trans_ws_in_delay(&self) -> I2S_TRANS_WS_IN_DELAY_R {
I2S_TRANS_WS_IN_DELAY_R::new(((self.bits >> 2) & 3) as u8)
}
#[doc = "Bits 0:1"]
#[inline(always)]
pub fn i2s_trans_bck_in_delay(&self) -> I2S_TRANS_BCK_IN_DELAY_R {
I2S_TRANS_BCK_IN_DELAY_R::new((self.bits & 3) as u8)
}
}
impl W {
#[doc = "Bit 22"]
#[inline(always)]
pub fn i2s_trans_bck_in_inv(&mut self) -> I2S_TRANS_BCK_IN_INV_W {
I2S_TRANS_BCK_IN_INV_W { w: self }
}
#[doc = "Bit 21"]
#[inline(always)]
pub fn i2s_rece_dsync_sw(&mut self) -> I2S_RECE_DSYNC_SW_W {
I2S_RECE_DSYNC_SW_W { w: self }
}
#[doc = "Bit 20"]
#[inline(always)]
pub fn i2s_trans_dsync_sw(&mut self) -> I2S_TRANS_DSYNC_SW_W {
I2S_TRANS_DSYNC_SW_W { w: self }
}
#[doc = "Bits 18:19"]
#[inline(always)]
pub fn i2s_rece_bck_out_delay(&mut self) -> I2S_RECE_BCK_OUT_DELAY_W {
I2S_RECE_BCK_OUT_DELAY_W { w: self }
}
#[doc = "Bits 16:17"]
#[inline(always)]
pub fn i2s_rece_ws_out_delay(&mut self) -> I2S_RECE_WS_OUT_DELAY_W {
I2S_RECE_WS_OUT_DELAY_W { w: self }
}
#[doc = "Bits 14:15"]
#[inline(always)]
pub fn i2s_trans_sd_out_delay(&mut self) -> I2S_TRANS_SD_OUT_DELAY_W {
I2S_TRANS_SD_OUT_DELAY_W { w: self }
}
#[doc = "Bits 12:13"]
#[inline(always)]
pub fn i2s_trans_ws_out_delay(&mut self) -> I2S_TRANS_WS_OUT_DELAY_W {
I2S_TRANS_WS_OUT_DELAY_W { w: self }
}
#[doc = "Bits 10:11"]
#[inline(always)]
pub fn i2s_trans_bck_out_delay(&mut self) -> I2S_TRANS_BCK_OUT_DELAY_W {
I2S_TRANS_BCK_OUT_DELAY_W { w: self }
}
#[doc = "Bits 8:9"]
#[inline(always)]
pub fn i2s_rece_sd_in_delay(&mut self) -> I2S_RECE_SD_IN_DELAY_W {
I2S_RECE_SD_IN_DELAY_W { w: self }
}
#[doc = "Bits 6:7"]
#[inline(always)]
pub fn i2s_rece_ws_in_delay(&mut self) -> I2S_RECE_WS_IN_DELAY_W {
I2S_RECE_WS_IN_DELAY_W { w: self }
}
#[doc = "Bits 4:5"]
#[inline(always)]
pub fn i2s_rece_bck_in_delay(&mut self) -> I2S_RECE_BCK_IN_DELAY_W {
I2S_RECE_BCK_IN_DELAY_W { w: self }
}
#[doc = "Bits 2:3"]
#[inline(always)]
pub fn i2s_trans_ws_in_delay(&mut self) -> I2S_TRANS_WS_IN_DELAY_W {
I2S_TRANS_WS_IN_DELAY_W { w: self }
}
#[doc = "Bits 0:1"]
#[inline(always)]
pub fn i2s_trans_bck_in_delay(&mut self) -> I2S_TRANS_BCK_IN_DELAY_W {
I2S_TRANS_BCK_IN_DELAY_W { w: self }
}
#[doc = "Writes raw bits to the register."]
#[inline(always)]
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
self.0.bits(bits);
self
}
}
#[doc = "I2STIMING\n\nThis register you can [`read`]
(crate::generic::Reg::read), [`write_with_zero`]
(crate::generic::Reg::write_with_zero), [`reset`]
(crate::generic::Reg::reset), [`write`]
(crate::generic::Reg::write), [`modify`]
(crate::generic::Reg::modify). See [API]
(https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [i2stiming]
(index.html) module"]
pub struct I2STIMING_SPEC;
impl crate::RegisterSpec for I2STIMING_SPEC {
type Ux = u32;
}
#[doc = "`read()` method returns [i2stiming::R]
(R) reader structure"]
impl crate::Readable for I2STIMING_SPEC {
type Reader = R;
}
#[doc = "`write(|w| ..)` method takes [i2stiming::W]
(W) writer structure"]
impl crate::Writable for I2STIMING_SPEC {
type Writer = W;
}
#[doc = "`reset()` method sets I2STIMING to value 0"]
impl crate::Resettable for I2STIMING_SPEC {
#[inline(always)]
fn reset_value() -> Self::Ux {
0
}
}