[][src]Struct esp8266::spi1::spi_user::W

pub struct W(_);

Writer for register SPI_USER

Implementations

impl W[src]

pub fn spi_usr_command(&mut self) -> SPI_USR_COMMAND_W<'_>[src]

Bit 31 - This bit enable the "command" phase of an operation.

pub fn spi_usr_addr(&mut self) -> SPI_USR_ADDR_W<'_>[src]

Bit 30 - This bit enable the "address" phase of an operation.

pub fn spi_usr_dummy(&mut self) -> SPI_USR_DUMMY_W<'_>[src]

Bit 29 - This bit enable the "dummy" phase of an operation.

pub fn spi_usr_miso(&mut self) -> SPI_USR_MISO_W<'_>[src]

Bit 28 - This bit enable the "read-data" phase of an operation.

pub fn spi_usr_mosi(&mut self) -> SPI_USR_MOSI_W<'_>[src]

Bit 27 - This bit enable the "write-data" phase of an operation.

pub fn reg_usr_mosi_highpart(&mut self) -> REG_USR_MOSI_HIGHPART_W<'_>[src]

Bit 25 - 1: "write-data" phase only access to high-part of the buffer spi_w8~spi_w15

pub fn reg_usr_miso_highpart(&mut self) -> REG_USR_MISO_HIGHPART_W<'_>[src]

Bit 24 - 1: "read-data" phase only access to high-part of the buffer spi_w8~spi_w15

pub fn spi_sio(&mut self) -> SPI_SIO_W<'_>[src]

Bit 16 - 1: mosi and miso signals share the same pin

pub fn spi_fwrite_qio(&mut self) -> SPI_FWRITE_QIO_W<'_>[src]

Bit 15 - In the write operations, "address" phase and "read-data" phase apply 4 signals

pub fn spi_fwrite_dio(&mut self) -> SPI_FWRITE_DIO_W<'_>[src]

Bit 14 - In the write operations, "address" phase and "read-data" phase apply 2 signals

pub fn spi_fwrite_quad(&mut self) -> SPI_FWRITE_QUAD_W<'_>[src]

Bit 13 - In the write operations, "read-data" phase apply 4 signals

pub fn spi_fwrite_dual(&mut self) -> SPI_FWRITE_DUAL_W<'_>[src]

Bit 12 - In the write operations, "read-data" phase apply 2 signals

pub fn spi_wr_byte_order(&mut self) -> SPI_WR_BYTE_ORDER_W<'_>[src]

Bit 11 - In "command", "address", "write-data" (MOSI) phases, 1: little-endian; 0: big_endian

pub fn spi_rd_byte_order(&mut self) -> SPI_RD_BYTE_ORDER_W<'_>[src]

Bit 10 - In "read-data" (MISO) phase, 1: little-endian; 0: big_endian

pub fn spi_ck_i_edge(&mut self) -> SPI_CK_I_EDGE_W<'_>[src]

Bit 6 - In the slave mode, 1: rising-edge; 0: falling-edge

pub fn spi_ck_o_edge(&mut self) -> SPI_CK_O_EDGE_W<'_>[src]

Bit 7 - In the master mode, 1: rising-edge; 0: falling-edge

pub fn spi_cs_setup(&mut self) -> SPI_CS_SETUP_W<'_>[src]

Bit 5 - spi cs is enable when spi is in prepare phase. 1: enable 0: disable.

pub fn spi_cs_hold(&mut self) -> SPI_CS_HOLD_W<'_>[src]

Bit 4 - spi cs keep low when spi is in done phase. 1: enable 0: disable.

pub fn spi_ahb_user_command(&mut self) -> SPI_AHB_USER_COMMAND_W<'_>[src]

Bit 3 - reserved

pub fn spi_flash_mode(&mut self) -> SPI_FLASH_MODE_W<'_>[src]

Bit 2

pub fn spi_ahb_user_command_4byte(&mut self) -> SPI_AHB_USER_COMMAND_4BYTE_W<'_>[src]

Bit 1 - reserved

pub fn spi_duplex(&mut self) -> SPI_DUPLEX_W<'_>[src]

Bit 0 - set spi in full duplex mode

pub unsafe fn bits(&mut self, bits: u32) -> &mut Self[src]

Writes raw bits to the register.

Methods from Deref<Target = W<SPI_USER_SPEC>>

pub unsafe fn bits(&mut self, bits: REG::Ux)[src]

Writes raw bits to the register.

Trait Implementations

impl Deref for W[src]

type Target = W<SPI_USER_SPEC>

The resulting type after dereferencing.

impl DerefMut for W[src]

impl From<W<SPI_USER_SPEC>> for W[src]

Auto Trait Implementations

impl Send for W

impl Sync for W

impl Unpin for W

Blanket Implementations

impl<T> Any for T where
    T: 'static + ?Sized
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impl<T> Borrow<T> for T where
    T: ?Sized
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impl<T> BorrowMut<T> for T where
    T: ?Sized
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impl<T> From<T> for T[src]

impl<T, U> Into<U> for T where
    U: From<T>, 
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impl<T, U> TryFrom<U> for T where
    U: Into<T>, 
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type Error = Infallible

The type returned in the event of a conversion error.

impl<T, U> TryInto<U> for T where
    U: TryFrom<T>, 
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type Error = <U as TryFrom<T>>::Error

The type returned in the event of a conversion error.