esp32s3/uart0/
status.rs

1#[doc = "Register `STATUS` reader"]
2pub type R = crate::R<STATUS_SPEC>;
3#[doc = "Field `RXFIFO_CNT` reader - Stores the byte number of valid data in Rx-FIFO."]
4pub type RXFIFO_CNT_R = crate::FieldReader<u16>;
5#[doc = "Field `DSRN` reader - The register represent the level value of the internal uart dsr signal."]
6pub type DSRN_R = crate::BitReader;
7#[doc = "Field `CTSN` reader - This register represent the level value of the internal uart cts signal."]
8pub type CTSN_R = crate::BitReader;
9#[doc = "Field `RXD` reader - This register represent the level value of the internal uart rxd signal."]
10pub type RXD_R = crate::BitReader;
11#[doc = "Field `TXFIFO_CNT` reader - Stores the byte number of data in Tx-FIFO."]
12pub type TXFIFO_CNT_R = crate::FieldReader<u16>;
13#[doc = "Field `DTRN` reader - This bit represents the level of the internal uart dtr signal."]
14pub type DTRN_R = crate::BitReader;
15#[doc = "Field `RTSN` reader - This bit represents the level of the internal uart rts signal."]
16pub type RTSN_R = crate::BitReader;
17#[doc = "Field `TXD` reader - This bit represents the level of the internal uart txd signal."]
18pub type TXD_R = crate::BitReader;
19impl R {
20    #[doc = "Bits 0:9 - Stores the byte number of valid data in Rx-FIFO."]
21    #[inline(always)]
22    pub fn rxfifo_cnt(&self) -> RXFIFO_CNT_R {
23        RXFIFO_CNT_R::new((self.bits & 0x03ff) as u16)
24    }
25    #[doc = "Bit 13 - The register represent the level value of the internal uart dsr signal."]
26    #[inline(always)]
27    pub fn dsrn(&self) -> DSRN_R {
28        DSRN_R::new(((self.bits >> 13) & 1) != 0)
29    }
30    #[doc = "Bit 14 - This register represent the level value of the internal uart cts signal."]
31    #[inline(always)]
32    pub fn ctsn(&self) -> CTSN_R {
33        CTSN_R::new(((self.bits >> 14) & 1) != 0)
34    }
35    #[doc = "Bit 15 - This register represent the level value of the internal uart rxd signal."]
36    #[inline(always)]
37    pub fn rxd(&self) -> RXD_R {
38        RXD_R::new(((self.bits >> 15) & 1) != 0)
39    }
40    #[doc = "Bits 16:25 - Stores the byte number of data in Tx-FIFO."]
41    #[inline(always)]
42    pub fn txfifo_cnt(&self) -> TXFIFO_CNT_R {
43        TXFIFO_CNT_R::new(((self.bits >> 16) & 0x03ff) as u16)
44    }
45    #[doc = "Bit 29 - This bit represents the level of the internal uart dtr signal."]
46    #[inline(always)]
47    pub fn dtrn(&self) -> DTRN_R {
48        DTRN_R::new(((self.bits >> 29) & 1) != 0)
49    }
50    #[doc = "Bit 30 - This bit represents the level of the internal uart rts signal."]
51    #[inline(always)]
52    pub fn rtsn(&self) -> RTSN_R {
53        RTSN_R::new(((self.bits >> 30) & 1) != 0)
54    }
55    #[doc = "Bit 31 - This bit represents the level of the internal uart txd signal."]
56    #[inline(always)]
57    pub fn txd(&self) -> TXD_R {
58        TXD_R::new(((self.bits >> 31) & 1) != 0)
59    }
60}
61#[cfg(feature = "impl-register-debug")]
62impl core::fmt::Debug for R {
63    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
64        f.debug_struct("STATUS")
65            .field("rxfifo_cnt", &self.rxfifo_cnt())
66            .field("dsrn", &self.dsrn())
67            .field("ctsn", &self.ctsn())
68            .field("rxd", &self.rxd())
69            .field("txfifo_cnt", &self.txfifo_cnt())
70            .field("dtrn", &self.dtrn())
71            .field("rtsn", &self.rtsn())
72            .field("txd", &self.txd())
73            .finish()
74    }
75}
76#[doc = "UART status register\n\nYou can [`read`](crate::Reg::read) this register and get [`status::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
77pub struct STATUS_SPEC;
78impl crate::RegisterSpec for STATUS_SPEC {
79    type Ux = u32;
80}
81#[doc = "`read()` method returns [`status::R`](R) reader structure"]
82impl crate::Readable for STATUS_SPEC {}
83#[doc = "`reset()` method sets STATUS to value 0xe000_c000"]
84impl crate::Resettable for STATUS_SPEC {
85    const RESET_VALUE: u32 = 0xe000_c000;
86}
esp32s3/uart0/status.rs

esp32s3/uart0/
status.rs
