1#[repr(C)]
2#[cfg_attr(feature = "impl-register-debug", derive(Debug))]
3#[doc = "Register block"]
4pub struct RegisterBlock {
5 conf: CONF,
6 unit_op: [UNIT_OP; 2],
7 unitload: [UNITLOAD; 2],
8 trgt: [TRGT; 3],
9 target_conf: [TARGET_CONF; 3],
10 unit_value: [UNIT_VALUE; 2],
11 comp_load: [COMP_LOAD; 3],
12 unit_load: [UNIT_LOAD; 2],
13 int_ena: INT_ENA,
14 int_raw: INT_RAW,
15 int_clr: INT_CLR,
16 int_st: INT_ST,
17 real_target: [REAL_TARGET; 3],
18 _reserved13: [u8; 0x70],
19 date: DATE,
20}
21impl RegisterBlock {
22 #[doc = "0x00 - Configure system timer clock"]
23 #[inline(always)]
24 pub const fn conf(&self) -> &CONF {
25 &self.conf
26 }
27 #[doc = "0x04..0x0c - system timer unit%s value update register"]
28 #[inline(always)]
29 pub const fn unit_op(&self, n: usize) -> &UNIT_OP {
30 &self.unit_op[n]
31 }
32 #[doc = "Iterator for array of:"]
33 #[doc = "0x04..0x0c - system timer unit%s value update register"]
34 #[inline(always)]
35 pub fn unit_op_iter(&self) -> impl Iterator<Item = &UNIT_OP> {
36 self.unit_op.iter()
37 }
38 #[doc = "0x04 - system timer unit0 value update register"]
39 #[inline(always)]
40 pub const fn unit0_op(&self) -> &UNIT_OP {
41 self.unit_op(0)
42 }
43 #[doc = "0x08 - system timer unit1 value update register"]
44 #[inline(always)]
45 pub const fn unit1_op(&self) -> &UNIT_OP {
46 self.unit_op(1)
47 }
48 #[doc = "0x0c..0x1c - Cluster UNIT%sLOAD, containing UNIT?_LOAD_HI, UNIT?_LOAD_LO"]
49 #[inline(always)]
50 pub const fn unitload(&self, n: usize) -> &UNITLOAD {
51 &self.unitload[n]
52 }
53 #[doc = "Iterator for array of:"]
54 #[doc = "0x0c..0x1c - Cluster UNIT%sLOAD, containing UNIT?_LOAD_HI, UNIT?_LOAD_LO"]
55 #[inline(always)]
56 pub fn unitload_iter(&self) -> impl Iterator<Item = &UNITLOAD> {
57 self.unitload.iter()
58 }
59 #[doc = "0x0c..0x14 - Cluster UNIT0LOAD, containing UNIT?_LOAD_HI, UNIT?_LOAD_LO"]
60 #[inline(always)]
61 pub const fn unit0load(&self) -> &UNITLOAD {
62 self.unitload(0)
63 }
64 #[doc = "0x14..0x1c - Cluster UNIT1LOAD, containing UNIT?_LOAD_HI, UNIT?_LOAD_LO"]
65 #[inline(always)]
66 pub const fn unit1load(&self) -> &UNITLOAD {
67 self.unitload(1)
68 }
69 #[doc = "0x1c..0x34 - Cluster TRGT%s, containing TARGET?_HI, TARGET?_LO"]
70 #[inline(always)]
71 pub const fn trgt(&self, n: usize) -> &TRGT {
72 &self.trgt[n]
73 }
74 #[doc = "Iterator for array of:"]
75 #[doc = "0x1c..0x34 - Cluster TRGT%s, containing TARGET?_HI, TARGET?_LO"]
76 #[inline(always)]
77 pub fn trgt_iter(&self) -> impl Iterator<Item = &TRGT> {
78 self.trgt.iter()
79 }
80 #[doc = "0x34..0x40 - system timer comp%s target mode register"]
81 #[inline(always)]
82 pub const fn target_conf(&self, n: usize) -> &TARGET_CONF {
83 &self.target_conf[n]
84 }
85 #[doc = "Iterator for array of:"]
86 #[doc = "0x34..0x40 - system timer comp%s target mode register"]
87 #[inline(always)]
88 pub fn target_conf_iter(&self) -> impl Iterator<Item = &TARGET_CONF> {
89 self.target_conf.iter()
90 }
91 #[doc = "0x34 - system timer comp0 target mode register"]
92 #[inline(always)]
93 pub const fn target0_conf(&self) -> &TARGET_CONF {
94 self.target_conf(0)
95 }
96 #[doc = "0x38 - system timer comp1 target mode register"]
97 #[inline(always)]
98 pub const fn target1_conf(&self) -> &TARGET_CONF {
99 self.target_conf(1)
100 }
101 #[doc = "0x3c - system timer comp2 target mode register"]
102 #[inline(always)]
103 pub const fn target2_conf(&self) -> &TARGET_CONF {
104 self.target_conf(2)
105 }
106 #[doc = "0x40..0x50 - Cluster UNIT%s_VALUE, containing UNIT?_VALUE_HI, UNIT?_VALUE_LO"]
107 #[inline(always)]
108 pub const fn unit_value(&self, n: usize) -> &UNIT_VALUE {
109 &self.unit_value[n]
110 }
111 #[doc = "Iterator for array of:"]
112 #[doc = "0x40..0x50 - Cluster UNIT%s_VALUE, containing UNIT?_VALUE_HI, UNIT?_VALUE_LO"]
113 #[inline(always)]
114 pub fn unit_value_iter(&self) -> impl Iterator<Item = &UNIT_VALUE> {
115 self.unit_value.iter()
116 }
117 #[doc = "0x40..0x48 - Cluster UNIT0_VALUE, containing UNIT?_VALUE_HI, UNIT?_VALUE_LO"]
118 #[inline(always)]
119 pub const fn unit0_value(&self) -> &UNIT_VALUE {
120 self.unit_value(0)
121 }
122 #[doc = "0x48..0x50 - Cluster UNIT1_VALUE, containing UNIT?_VALUE_HI, UNIT?_VALUE_LO"]
123 #[inline(always)]
124 pub const fn unit1_value(&self) -> &UNIT_VALUE {
125 self.unit_value(1)
126 }
127 #[doc = "0x50..0x5c - system timer comp%s conf sync register"]
128 #[inline(always)]
129 pub const fn comp_load(&self, n: usize) -> &COMP_LOAD {
130 &self.comp_load[n]
131 }
132 #[doc = "Iterator for array of:"]
133 #[doc = "0x50..0x5c - system timer comp%s conf sync register"]
134 #[inline(always)]
135 pub fn comp_load_iter(&self) -> impl Iterator<Item = &COMP_LOAD> {
136 self.comp_load.iter()
137 }
138 #[doc = "0x50 - system timer comp0 conf sync register"]
139 #[inline(always)]
140 pub const fn comp0_load(&self) -> &COMP_LOAD {
141 self.comp_load(0)
142 }
143 #[doc = "0x54 - system timer comp1 conf sync register"]
144 #[inline(always)]
145 pub const fn comp1_load(&self) -> &COMP_LOAD {
146 self.comp_load(1)
147 }
148 #[doc = "0x58 - system timer comp2 conf sync register"]
149 #[inline(always)]
150 pub const fn comp2_load(&self) -> &COMP_LOAD {
151 self.comp_load(2)
152 }
153 #[doc = "0x5c..0x64 - system timer unit%s conf sync register"]
154 #[inline(always)]
155 pub const fn unit_load(&self, n: usize) -> &UNIT_LOAD {
156 &self.unit_load[n]
157 }
158 #[doc = "Iterator for array of:"]
159 #[doc = "0x5c..0x64 - system timer unit%s conf sync register"]
160 #[inline(always)]
161 pub fn unit_load_iter(&self) -> impl Iterator<Item = &UNIT_LOAD> {
162 self.unit_load.iter()
163 }
164 #[doc = "0x5c - system timer unit0 conf sync register"]
165 #[inline(always)]
166 pub const fn unit0_load(&self) -> &UNIT_LOAD {
167 self.unit_load(0)
168 }
169 #[doc = "0x60 - system timer unit1 conf sync register"]
170 #[inline(always)]
171 pub const fn unit1_load(&self) -> &UNIT_LOAD {
172 self.unit_load(1)
173 }
174 #[doc = "0x64 - systimer interrupt enable register"]
175 #[inline(always)]
176 pub const fn int_ena(&self) -> &INT_ENA {
177 &self.int_ena
178 }
179 #[doc = "0x68 - systimer interrupt raw register"]
180 #[inline(always)]
181 pub const fn int_raw(&self) -> &INT_RAW {
182 &self.int_raw
183 }
184 #[doc = "0x6c - systimer interrupt clear register"]
185 #[inline(always)]
186 pub const fn int_clr(&self) -> &INT_CLR {
187 &self.int_clr
188 }
189 #[doc = "0x70 - systimer interrupt status register"]
190 #[inline(always)]
191 pub const fn int_st(&self) -> &INT_ST {
192 &self.int_st
193 }
194 #[doc = "0x74..0x8c - Cluster REAL_TARGET%s, containing REAL_TARGET?_LO, REAL_TARGET?_HI"]
195 #[inline(always)]
196 pub const fn real_target(&self, n: usize) -> &REAL_TARGET {
197 &self.real_target[n]
198 }
199 #[doc = "Iterator for array of:"]
200 #[doc = "0x74..0x8c - Cluster REAL_TARGET%s, containing REAL_TARGET?_LO, REAL_TARGET?_HI"]
201 #[inline(always)]
202 pub fn real_target_iter(&self) -> impl Iterator<Item = &REAL_TARGET> {
203 self.real_target.iter()
204 }
205 #[doc = "0xfc - system timer version control register"]
206 #[inline(always)]
207 pub const fn date(&self) -> &DATE {
208 &self.date
209 }
210}
211#[doc = "CONF (rw) register accessor: Configure system timer clock\n\nYou can [`read`](crate::Reg::read) this register and get [`conf::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`conf::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@conf`] module"]
212pub type CONF = crate::Reg<conf::CONF_SPEC>;
213#[doc = "Configure system timer clock"]
214pub mod conf;
215#[doc = "UNIT_OP (rw) register accessor: system timer unit%s value update register\n\nYou can [`read`](crate::Reg::read) this register and get [`unit_op::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`unit_op::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@unit_op`] module"]
216pub type UNIT_OP = crate::Reg<unit_op::UNIT_OP_SPEC>;
217#[doc = "system timer unit%s value update register"]
218pub mod unit_op;
219#[doc = "Cluster UNIT%sLOAD, containing UNIT?_LOAD_HI, UNIT?_LOAD_LO"]
220pub use self::unitload::UNITLOAD;
221#[doc = r"Cluster"]
222#[doc = "Cluster UNIT%sLOAD, containing UNIT?_LOAD_HI, UNIT?_LOAD_LO"]
223pub mod unitload;
224#[doc = "Cluster TRGT%s, containing TARGET?_HI, TARGET?_LO"]
225pub use self::trgt::TRGT;
226#[doc = r"Cluster"]
227#[doc = "Cluster TRGT%s, containing TARGET?_HI, TARGET?_LO"]
228pub mod trgt;
229#[doc = "TARGET_CONF (rw) register accessor: system timer comp%s target mode register\n\nYou can [`read`](crate::Reg::read) this register and get [`target_conf::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`target_conf::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@target_conf`] module"]
230pub type TARGET_CONF = crate::Reg<target_conf::TARGET_CONF_SPEC>;
231#[doc = "system timer comp%s target mode register"]
232pub mod target_conf;
233#[doc = "Cluster UNIT%s_VALUE, containing UNIT?_VALUE_HI, UNIT?_VALUE_LO"]
234pub use self::unit_value::UNIT_VALUE;
235#[doc = r"Cluster"]
236#[doc = "Cluster UNIT%s_VALUE, containing UNIT?_VALUE_HI, UNIT?_VALUE_LO"]
237pub mod unit_value;
238#[doc = "COMP_LOAD (w) register accessor: system timer comp%s conf sync register\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`comp_load::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@comp_load`] module"]
239pub type COMP_LOAD = crate::Reg<comp_load::COMP_LOAD_SPEC>;
240#[doc = "system timer comp%s conf sync register"]
241pub mod comp_load;
242#[doc = "UNIT_LOAD (w) register accessor: system timer unit%s conf sync register\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`unit_load::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@unit_load`] module"]
243pub type UNIT_LOAD = crate::Reg<unit_load::UNIT_LOAD_SPEC>;
244#[doc = "system timer unit%s conf sync register"]
245pub mod unit_load;
246#[doc = "INT_ENA (rw) register accessor: systimer interrupt enable register\n\nYou can [`read`](crate::Reg::read) this register and get [`int_ena::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`int_ena::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@int_ena`] module"]
247pub type INT_ENA = crate::Reg<int_ena::INT_ENA_SPEC>;
248#[doc = "systimer interrupt enable register"]
249pub mod int_ena;
250#[doc = "INT_RAW (rw) register accessor: systimer interrupt raw register\n\nYou can [`read`](crate::Reg::read) this register and get [`int_raw::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`int_raw::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@int_raw`] module"]
251pub type INT_RAW = crate::Reg<int_raw::INT_RAW_SPEC>;
252#[doc = "systimer interrupt raw register"]
253pub mod int_raw;
254#[doc = "INT_CLR (w) register accessor: systimer interrupt clear register\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`int_clr::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@int_clr`] module"]
255pub type INT_CLR = crate::Reg<int_clr::INT_CLR_SPEC>;
256#[doc = "systimer interrupt clear register"]
257pub mod int_clr;
258#[doc = "INT_ST (r) register accessor: systimer interrupt status register\n\nYou can [`read`](crate::Reg::read) this register and get [`int_st::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@int_st`] module"]
259pub type INT_ST = crate::Reg<int_st::INT_ST_SPEC>;
260#[doc = "systimer interrupt status register"]
261pub mod int_st;
262#[doc = "Cluster REAL_TARGET%s, containing REAL_TARGET?_LO, REAL_TARGET?_HI"]
263pub use self::real_target::REAL_TARGET;
264#[doc = r"Cluster"]
265#[doc = "Cluster REAL_TARGET%s, containing REAL_TARGET?_LO, REAL_TARGET?_HI"]
266pub mod real_target;
267#[doc = "DATE (rw) register accessor: system timer version control register\n\nYou can [`read`](crate::Reg::read) this register and get [`date::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`date::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@date`] module"]
268pub type DATE = crate::Reg<date::DATE_SPEC>;
269#[doc = "system timer version control register"]
270pub mod date;