1#[doc = "Register `INT_RAW` reader"]
2pub type R = crate::R<INT_RAW_SPEC>;
3#[doc = "Register `INT_RAW` writer"]
4pub type W = crate::W<INT_RAW_SPEC>;
5#[doc = "Field `CH_TX_END(0-3)` reader - The interrupt raw bit for CHANNEL%s. Triggered when transmission done."]
6pub type CH_TX_END_R = crate::BitReader;
7#[doc = "Field `CH_TX_END(0-3)` writer - The interrupt raw bit for CHANNEL%s. Triggered when transmission done."]
8pub type CH_TX_END_W<'a, REG> = crate::BitWriter<'a, REG>;
9#[doc = "Field `CH_TX_ERR(0-3)` reader - The interrupt raw bit for CHANNEL%s. Triggered when error occurs."]
10pub type CH_TX_ERR_R = crate::BitReader;
11#[doc = "Field `CH_TX_ERR(0-3)` writer - The interrupt raw bit for CHANNEL%s. Triggered when error occurs."]
12pub type CH_TX_ERR_W<'a, REG> = crate::BitWriter<'a, REG>;
13#[doc = "Field `CH_TX_THR_EVENT(0-3)` reader - The interrupt raw bit for CHANNEL%s. Triggered when transmitter sent more data than configured value."]
14pub type CH_TX_THR_EVENT_R = crate::BitReader;
15#[doc = "Field `CH_TX_THR_EVENT(0-3)` writer - The interrupt raw bit for CHANNEL%s. Triggered when transmitter sent more data than configured value."]
16pub type CH_TX_THR_EVENT_W<'a, REG> = crate::BitWriter<'a, REG>;
17#[doc = "Field `CH_TX_LOOP(0-3)` reader - The interrupt raw bit for CHANNEL%s. Triggered when the loop count reaches the configured threshold value."]
18pub type CH_TX_LOOP_R = crate::BitReader;
19#[doc = "Field `CH_TX_LOOP(0-3)` writer - The interrupt raw bit for CHANNEL%s. Triggered when the loop count reaches the configured threshold value."]
20pub type CH_TX_LOOP_W<'a, REG> = crate::BitWriter<'a, REG>;
21#[doc = "Field `CH_RX_END(4-7)` reader - The interrupt raw bit for CHANNEL4. Triggered when reception done."]
22pub type CH_RX_END_R = crate::BitReader;
23#[doc = "Field `CH_RX_END(4-7)` writer - The interrupt raw bit for CHANNEL4. Triggered when reception done."]
24pub type CH_RX_END_W<'a, REG> = crate::BitWriter<'a, REG>;
25#[doc = "Field `CH_RX_ERR(4-7)` reader - The interrupt raw bit for CHANNEL4. Triggered when error occurs."]
26pub type CH_RX_ERR_R = crate::BitReader;
27#[doc = "Field `CH_RX_ERR(4-7)` writer - The interrupt raw bit for CHANNEL4. Triggered when error occurs."]
28pub type CH_RX_ERR_W<'a, REG> = crate::BitWriter<'a, REG>;
29#[doc = "Field `CH_RX_THR_EVENT(4-7)` reader - The interrupt raw bit for CHANNEL4. Triggered when receiver receive more data than configured value."]
30pub type CH_RX_THR_EVENT_R = crate::BitReader;
31#[doc = "Field `CH_RX_THR_EVENT(4-7)` writer - The interrupt raw bit for CHANNEL4. Triggered when receiver receive more data than configured value."]
32pub type CH_RX_THR_EVENT_W<'a, REG> = crate::BitWriter<'a, REG>;
33#[doc = "Field `TX_CH3_DMA_ACCESS_FAIL` reader - The interrupt raw bit for CHANNEL3. Triggered when dma accessing CHANNEL3 fails."]
34pub type TX_CH3_DMA_ACCESS_FAIL_R = crate::BitReader;
35#[doc = "Field `TX_CH3_DMA_ACCESS_FAIL` writer - The interrupt raw bit for CHANNEL3. Triggered when dma accessing CHANNEL3 fails."]
36pub type TX_CH3_DMA_ACCESS_FAIL_W<'a, REG> = crate::BitWriter<'a, REG>;
37#[doc = "Field `RX_CH7_DMA_ACCESS_FAIL` reader - The interrupt raw bit for CHANNEL7. Triggered when dma accessing CHANNEL7 fails."]
38pub type RX_CH7_DMA_ACCESS_FAIL_R = crate::BitReader;
39#[doc = "Field `RX_CH7_DMA_ACCESS_FAIL` writer - The interrupt raw bit for CHANNEL7. Triggered when dma accessing CHANNEL7 fails."]
40pub type RX_CH7_DMA_ACCESS_FAIL_W<'a, REG> = crate::BitWriter<'a, REG>;
41impl R {
42 #[doc = "The interrupt raw bit for CHANNEL(0-3). Triggered when transmission done."]
43 #[doc = ""]
44 #[doc = "<div class=\"warning\">`n` is number of field in register. `n == 0` corresponds to `CH0_TX_END` field.</div>"]
45 #[inline(always)]
46 pub fn ch_tx_end(&self, n: u8) -> CH_TX_END_R {
47 #[allow(clippy::no_effect)]
48 [(); 4][n as usize];
49 CH_TX_END_R::new(((self.bits >> n) & 1) != 0)
50 }
51 #[doc = "Iterator for array of:"]
52 #[doc = "The interrupt raw bit for CHANNEL(0-3). Triggered when transmission done."]
53 #[inline(always)]
54 pub fn ch_tx_end_iter(&self) -> impl Iterator<Item = CH_TX_END_R> + '_ {
55 (0..4).map(move |n| CH_TX_END_R::new(((self.bits >> n) & 1) != 0))
56 }
57 #[doc = "Bit 0 - The interrupt raw bit for CHANNEL0. Triggered when transmission done."]
58 #[inline(always)]
59 pub fn ch0_tx_end(&self) -> CH_TX_END_R {
60 CH_TX_END_R::new((self.bits & 1) != 0)
61 }
62 #[doc = "Bit 1 - The interrupt raw bit for CHANNEL1. Triggered when transmission done."]
63 #[inline(always)]
64 pub fn ch1_tx_end(&self) -> CH_TX_END_R {
65 CH_TX_END_R::new(((self.bits >> 1) & 1) != 0)
66 }
67 #[doc = "Bit 2 - The interrupt raw bit for CHANNEL2. Triggered when transmission done."]
68 #[inline(always)]
69 pub fn ch2_tx_end(&self) -> CH_TX_END_R {
70 CH_TX_END_R::new(((self.bits >> 2) & 1) != 0)
71 }
72 #[doc = "Bit 3 - The interrupt raw bit for CHANNEL3. Triggered when transmission done."]
73 #[inline(always)]
74 pub fn ch3_tx_end(&self) -> CH_TX_END_R {
75 CH_TX_END_R::new(((self.bits >> 3) & 1) != 0)
76 }
77 #[doc = "The interrupt raw bit for CHANNEL(0-3). Triggered when error occurs."]
78 #[doc = ""]
79 #[doc = "<div class=\"warning\">`n` is number of field in register. `n == 0` corresponds to `CH0_TX_ERR` field.</div>"]
80 #[inline(always)]
81 pub fn ch_tx_err(&self, n: u8) -> CH_TX_ERR_R {
82 #[allow(clippy::no_effect)]
83 [(); 4][n as usize];
84 CH_TX_ERR_R::new(((self.bits >> (n + 4)) & 1) != 0)
85 }
86 #[doc = "Iterator for array of:"]
87 #[doc = "The interrupt raw bit for CHANNEL(0-3). Triggered when error occurs."]
88 #[inline(always)]
89 pub fn ch_tx_err_iter(&self) -> impl Iterator<Item = CH_TX_ERR_R> + '_ {
90 (0..4).map(move |n| CH_TX_ERR_R::new(((self.bits >> (n + 4)) & 1) != 0))
91 }
92 #[doc = "Bit 4 - The interrupt raw bit for CHANNEL0. Triggered when error occurs."]
93 #[inline(always)]
94 pub fn ch0_tx_err(&self) -> CH_TX_ERR_R {
95 CH_TX_ERR_R::new(((self.bits >> 4) & 1) != 0)
96 }
97 #[doc = "Bit 5 - The interrupt raw bit for CHANNEL1. Triggered when error occurs."]
98 #[inline(always)]
99 pub fn ch1_tx_err(&self) -> CH_TX_ERR_R {
100 CH_TX_ERR_R::new(((self.bits >> 5) & 1) != 0)
101 }
102 #[doc = "Bit 6 - The interrupt raw bit for CHANNEL2. Triggered when error occurs."]
103 #[inline(always)]
104 pub fn ch2_tx_err(&self) -> CH_TX_ERR_R {
105 CH_TX_ERR_R::new(((self.bits >> 6) & 1) != 0)
106 }
107 #[doc = "Bit 7 - The interrupt raw bit for CHANNEL3. Triggered when error occurs."]
108 #[inline(always)]
109 pub fn ch3_tx_err(&self) -> CH_TX_ERR_R {
110 CH_TX_ERR_R::new(((self.bits >> 7) & 1) != 0)
111 }
112 #[doc = "The interrupt raw bit for CHANNEL(0-3). Triggered when transmitter sent more data than configured value."]
113 #[doc = ""]
114 #[doc = "<div class=\"warning\">`n` is number of field in register. `n == 0` corresponds to `CH0_TX_THR_EVENT` field.</div>"]
115 #[inline(always)]
116 pub fn ch_tx_thr_event(&self, n: u8) -> CH_TX_THR_EVENT_R {
117 #[allow(clippy::no_effect)]
118 [(); 4][n as usize];
119 CH_TX_THR_EVENT_R::new(((self.bits >> (n + 8)) & 1) != 0)
120 }
121 #[doc = "Iterator for array of:"]
122 #[doc = "The interrupt raw bit for CHANNEL(0-3). Triggered when transmitter sent more data than configured value."]
123 #[inline(always)]
124 pub fn ch_tx_thr_event_iter(&self) -> impl Iterator<Item = CH_TX_THR_EVENT_R> + '_ {
125 (0..4).map(move |n| CH_TX_THR_EVENT_R::new(((self.bits >> (n + 8)) & 1) != 0))
126 }
127 #[doc = "Bit 8 - The interrupt raw bit for CHANNEL0. Triggered when transmitter sent more data than configured value."]
128 #[inline(always)]
129 pub fn ch0_tx_thr_event(&self) -> CH_TX_THR_EVENT_R {
130 CH_TX_THR_EVENT_R::new(((self.bits >> 8) & 1) != 0)
131 }
132 #[doc = "Bit 9 - The interrupt raw bit for CHANNEL1. Triggered when transmitter sent more data than configured value."]
133 #[inline(always)]
134 pub fn ch1_tx_thr_event(&self) -> CH_TX_THR_EVENT_R {
135 CH_TX_THR_EVENT_R::new(((self.bits >> 9) & 1) != 0)
136 }
137 #[doc = "Bit 10 - The interrupt raw bit for CHANNEL2. Triggered when transmitter sent more data than configured value."]
138 #[inline(always)]
139 pub fn ch2_tx_thr_event(&self) -> CH_TX_THR_EVENT_R {
140 CH_TX_THR_EVENT_R::new(((self.bits >> 10) & 1) != 0)
141 }
142 #[doc = "Bit 11 - The interrupt raw bit for CHANNEL3. Triggered when transmitter sent more data than configured value."]
143 #[inline(always)]
144 pub fn ch3_tx_thr_event(&self) -> CH_TX_THR_EVENT_R {
145 CH_TX_THR_EVENT_R::new(((self.bits >> 11) & 1) != 0)
146 }
147 #[doc = "The interrupt raw bit for CHANNEL(0-3). Triggered when the loop count reaches the configured threshold value."]
148 #[doc = ""]
149 #[doc = "<div class=\"warning\">`n` is number of field in register. `n == 0` corresponds to `CH0_TX_LOOP` field.</div>"]
150 #[inline(always)]
151 pub fn ch_tx_loop(&self, n: u8) -> CH_TX_LOOP_R {
152 #[allow(clippy::no_effect)]
153 [(); 4][n as usize];
154 CH_TX_LOOP_R::new(((self.bits >> (n + 12)) & 1) != 0)
155 }
156 #[doc = "Iterator for array of:"]
157 #[doc = "The interrupt raw bit for CHANNEL(0-3). Triggered when the loop count reaches the configured threshold value."]
158 #[inline(always)]
159 pub fn ch_tx_loop_iter(&self) -> impl Iterator<Item = CH_TX_LOOP_R> + '_ {
160 (0..4).map(move |n| CH_TX_LOOP_R::new(((self.bits >> (n + 12)) & 1) != 0))
161 }
162 #[doc = "Bit 12 - The interrupt raw bit for CHANNEL0. Triggered when the loop count reaches the configured threshold value."]
163 #[inline(always)]
164 pub fn ch0_tx_loop(&self) -> CH_TX_LOOP_R {
165 CH_TX_LOOP_R::new(((self.bits >> 12) & 1) != 0)
166 }
167 #[doc = "Bit 13 - The interrupt raw bit for CHANNEL1. Triggered when the loop count reaches the configured threshold value."]
168 #[inline(always)]
169 pub fn ch1_tx_loop(&self) -> CH_TX_LOOP_R {
170 CH_TX_LOOP_R::new(((self.bits >> 13) & 1) != 0)
171 }
172 #[doc = "Bit 14 - The interrupt raw bit for CHANNEL2. Triggered when the loop count reaches the configured threshold value."]
173 #[inline(always)]
174 pub fn ch2_tx_loop(&self) -> CH_TX_LOOP_R {
175 CH_TX_LOOP_R::new(((self.bits >> 14) & 1) != 0)
176 }
177 #[doc = "Bit 15 - The interrupt raw bit for CHANNEL3. Triggered when the loop count reaches the configured threshold value."]
178 #[inline(always)]
179 pub fn ch3_tx_loop(&self) -> CH_TX_LOOP_R {
180 CH_TX_LOOP_R::new(((self.bits >> 15) & 1) != 0)
181 }
182 #[doc = "The interrupt raw bit for CHANNEL4. Triggered when reception done."]
183 #[doc = ""]
184 #[doc = "<div class=\"warning\">`n` is number of field in register. `n == 0` corresponds to `CH4_RX_END` field.</div>"]
185 #[inline(always)]
186 pub fn ch_rx_end(&self, n: u8) -> CH_RX_END_R {
187 #[allow(clippy::no_effect)]
188 [(); 4][n as usize];
189 CH_RX_END_R::new(((self.bits >> (n + 16)) & 1) != 0)
190 }
191 #[doc = "Iterator for array of:"]
192 #[doc = "The interrupt raw bit for CHANNEL4. Triggered when reception done."]
193 #[inline(always)]
194 pub fn ch_rx_end_iter(&self) -> impl Iterator<Item = CH_RX_END_R> + '_ {
195 (0..4).map(move |n| CH_RX_END_R::new(((self.bits >> (n + 16)) & 1) != 0))
196 }
197 #[doc = "Bit 16 - The interrupt raw bit for CHANNEL4. Triggered when reception done."]
198 #[inline(always)]
199 pub fn ch4_rx_end(&self) -> CH_RX_END_R {
200 CH_RX_END_R::new(((self.bits >> 16) & 1) != 0)
201 }
202 #[doc = "Bit 17 - The interrupt raw bit for CHANNEL4. Triggered when reception done."]
203 #[inline(always)]
204 pub fn ch5_rx_end(&self) -> CH_RX_END_R {
205 CH_RX_END_R::new(((self.bits >> 17) & 1) != 0)
206 }
207 #[doc = "Bit 18 - The interrupt raw bit for CHANNEL4. Triggered when reception done."]
208 #[inline(always)]
209 pub fn ch6_rx_end(&self) -> CH_RX_END_R {
210 CH_RX_END_R::new(((self.bits >> 18) & 1) != 0)
211 }
212 #[doc = "Bit 19 - The interrupt raw bit for CHANNEL4. Triggered when reception done."]
213 #[inline(always)]
214 pub fn ch7_rx_end(&self) -> CH_RX_END_R {
215 CH_RX_END_R::new(((self.bits >> 19) & 1) != 0)
216 }
217 #[doc = "The interrupt raw bit for CHANNEL4. Triggered when error occurs."]
218 #[doc = ""]
219 #[doc = "<div class=\"warning\">`n` is number of field in register. `n == 0` corresponds to `CH4_RX_ERR` field.</div>"]
220 #[inline(always)]
221 pub fn ch_rx_err(&self, n: u8) -> CH_RX_ERR_R {
222 #[allow(clippy::no_effect)]
223 [(); 4][n as usize];
224 CH_RX_ERR_R::new(((self.bits >> (n + 20)) & 1) != 0)
225 }
226 #[doc = "Iterator for array of:"]
227 #[doc = "The interrupt raw bit for CHANNEL4. Triggered when error occurs."]
228 #[inline(always)]
229 pub fn ch_rx_err_iter(&self) -> impl Iterator<Item = CH_RX_ERR_R> + '_ {
230 (0..4).map(move |n| CH_RX_ERR_R::new(((self.bits >> (n + 20)) & 1) != 0))
231 }
232 #[doc = "Bit 20 - The interrupt raw bit for CHANNEL4. Triggered when error occurs."]
233 #[inline(always)]
234 pub fn ch4_rx_err(&self) -> CH_RX_ERR_R {
235 CH_RX_ERR_R::new(((self.bits >> 20) & 1) != 0)
236 }
237 #[doc = "Bit 21 - The interrupt raw bit for CHANNEL4. Triggered when error occurs."]
238 #[inline(always)]
239 pub fn ch5_rx_err(&self) -> CH_RX_ERR_R {
240 CH_RX_ERR_R::new(((self.bits >> 21) & 1) != 0)
241 }
242 #[doc = "Bit 22 - The interrupt raw bit for CHANNEL4. Triggered when error occurs."]
243 #[inline(always)]
244 pub fn ch6_rx_err(&self) -> CH_RX_ERR_R {
245 CH_RX_ERR_R::new(((self.bits >> 22) & 1) != 0)
246 }
247 #[doc = "Bit 23 - The interrupt raw bit for CHANNEL4. Triggered when error occurs."]
248 #[inline(always)]
249 pub fn ch7_rx_err(&self) -> CH_RX_ERR_R {
250 CH_RX_ERR_R::new(((self.bits >> 23) & 1) != 0)
251 }
252 #[doc = "The interrupt raw bit for CHANNEL4. Triggered when receiver receive more data than configured value."]
253 #[doc = ""]
254 #[doc = "<div class=\"warning\">`n` is number of field in register. `n == 0` corresponds to `CH4_RX_THR_EVENT` field.</div>"]
255 #[inline(always)]
256 pub fn ch_rx_thr_event(&self, n: u8) -> CH_RX_THR_EVENT_R {
257 #[allow(clippy::no_effect)]
258 [(); 4][n as usize];
259 CH_RX_THR_EVENT_R::new(((self.bits >> (n + 24)) & 1) != 0)
260 }
261 #[doc = "Iterator for array of:"]
262 #[doc = "The interrupt raw bit for CHANNEL4. Triggered when receiver receive more data than configured value."]
263 #[inline(always)]
264 pub fn ch_rx_thr_event_iter(&self) -> impl Iterator<Item = CH_RX_THR_EVENT_R> + '_ {
265 (0..4).map(move |n| CH_RX_THR_EVENT_R::new(((self.bits >> (n + 24)) & 1) != 0))
266 }
267 #[doc = "Bit 24 - The interrupt raw bit for CHANNEL4. Triggered when receiver receive more data than configured value."]
268 #[inline(always)]
269 pub fn ch4_rx_thr_event(&self) -> CH_RX_THR_EVENT_R {
270 CH_RX_THR_EVENT_R::new(((self.bits >> 24) & 1) != 0)
271 }
272 #[doc = "Bit 25 - The interrupt raw bit for CHANNEL4. Triggered when receiver receive more data than configured value."]
273 #[inline(always)]
274 pub fn ch5_rx_thr_event(&self) -> CH_RX_THR_EVENT_R {
275 CH_RX_THR_EVENT_R::new(((self.bits >> 25) & 1) != 0)
276 }
277 #[doc = "Bit 26 - The interrupt raw bit for CHANNEL4. Triggered when receiver receive more data than configured value."]
278 #[inline(always)]
279 pub fn ch6_rx_thr_event(&self) -> CH_RX_THR_EVENT_R {
280 CH_RX_THR_EVENT_R::new(((self.bits >> 26) & 1) != 0)
281 }
282 #[doc = "Bit 27 - The interrupt raw bit for CHANNEL4. Triggered when receiver receive more data than configured value."]
283 #[inline(always)]
284 pub fn ch7_rx_thr_event(&self) -> CH_RX_THR_EVENT_R {
285 CH_RX_THR_EVENT_R::new(((self.bits >> 27) & 1) != 0)
286 }
287 #[doc = "Bit 28 - The interrupt raw bit for CHANNEL3. Triggered when dma accessing CHANNEL3 fails."]
288 #[inline(always)]
289 pub fn tx_ch3_dma_access_fail(&self) -> TX_CH3_DMA_ACCESS_FAIL_R {
290 TX_CH3_DMA_ACCESS_FAIL_R::new(((self.bits >> 28) & 1) != 0)
291 }
292 #[doc = "Bit 29 - The interrupt raw bit for CHANNEL7. Triggered when dma accessing CHANNEL7 fails."]
293 #[inline(always)]
294 pub fn rx_ch7_dma_access_fail(&self) -> RX_CH7_DMA_ACCESS_FAIL_R {
295 RX_CH7_DMA_ACCESS_FAIL_R::new(((self.bits >> 29) & 1) != 0)
296 }
297}
298#[cfg(feature = "impl-register-debug")]
299impl core::fmt::Debug for R {
300 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
301 f.debug_struct("INT_RAW")
302 .field("ch0_tx_end", &self.ch0_tx_end())
303 .field("ch1_tx_end", &self.ch1_tx_end())
304 .field("ch2_tx_end", &self.ch2_tx_end())
305 .field("ch3_tx_end", &self.ch3_tx_end())
306 .field("ch0_tx_err", &self.ch0_tx_err())
307 .field("ch1_tx_err", &self.ch1_tx_err())
308 .field("ch2_tx_err", &self.ch2_tx_err())
309 .field("ch3_tx_err", &self.ch3_tx_err())
310 .field("ch0_tx_thr_event", &self.ch0_tx_thr_event())
311 .field("ch1_tx_thr_event", &self.ch1_tx_thr_event())
312 .field("ch2_tx_thr_event", &self.ch2_tx_thr_event())
313 .field("ch3_tx_thr_event", &self.ch3_tx_thr_event())
314 .field("ch0_tx_loop", &self.ch0_tx_loop())
315 .field("ch1_tx_loop", &self.ch1_tx_loop())
316 .field("ch2_tx_loop", &self.ch2_tx_loop())
317 .field("ch3_tx_loop", &self.ch3_tx_loop())
318 .field("ch4_rx_end", &self.ch4_rx_end())
319 .field("ch5_rx_end", &self.ch5_rx_end())
320 .field("ch6_rx_end", &self.ch6_rx_end())
321 .field("ch7_rx_end", &self.ch7_rx_end())
322 .field("ch4_rx_err", &self.ch4_rx_err())
323 .field("ch5_rx_err", &self.ch5_rx_err())
324 .field("ch6_rx_err", &self.ch6_rx_err())
325 .field("ch7_rx_err", &self.ch7_rx_err())
326 .field("ch4_rx_thr_event", &self.ch4_rx_thr_event())
327 .field("ch5_rx_thr_event", &self.ch5_rx_thr_event())
328 .field("ch6_rx_thr_event", &self.ch6_rx_thr_event())
329 .field("ch7_rx_thr_event", &self.ch7_rx_thr_event())
330 .field("tx_ch3_dma_access_fail", &self.tx_ch3_dma_access_fail())
331 .field("rx_ch7_dma_access_fail", &self.rx_ch7_dma_access_fail())
332 .finish()
333 }
334}
335impl W {
336 #[doc = "The interrupt raw bit for CHANNEL(0-3). Triggered when transmission done."]
337 #[doc = ""]
338 #[doc = "<div class=\"warning\">`n` is number of field in register. `n == 0` corresponds to `CH0_TX_END` field.</div>"]
339 #[inline(always)]
340 pub fn ch_tx_end(&mut self, n: u8) -> CH_TX_END_W<INT_RAW_SPEC> {
341 #[allow(clippy::no_effect)]
342 [(); 4][n as usize];
343 CH_TX_END_W::new(self, n)
344 }
345 #[doc = "Bit 0 - The interrupt raw bit for CHANNEL0. Triggered when transmission done."]
346 #[inline(always)]
347 pub fn ch0_tx_end(&mut self) -> CH_TX_END_W<INT_RAW_SPEC> {
348 CH_TX_END_W::new(self, 0)
349 }
350 #[doc = "Bit 1 - The interrupt raw bit for CHANNEL1. Triggered when transmission done."]
351 #[inline(always)]
352 pub fn ch1_tx_end(&mut self) -> CH_TX_END_W<INT_RAW_SPEC> {
353 CH_TX_END_W::new(self, 1)
354 }
355 #[doc = "Bit 2 - The interrupt raw bit for CHANNEL2. Triggered when transmission done."]
356 #[inline(always)]
357 pub fn ch2_tx_end(&mut self) -> CH_TX_END_W<INT_RAW_SPEC> {
358 CH_TX_END_W::new(self, 2)
359 }
360 #[doc = "Bit 3 - The interrupt raw bit for CHANNEL3. Triggered when transmission done."]
361 #[inline(always)]
362 pub fn ch3_tx_end(&mut self) -> CH_TX_END_W<INT_RAW_SPEC> {
363 CH_TX_END_W::new(self, 3)
364 }
365 #[doc = "The interrupt raw bit for CHANNEL(0-3). Triggered when error occurs."]
366 #[doc = ""]
367 #[doc = "<div class=\"warning\">`n` is number of field in register. `n == 0` corresponds to `CH0_TX_ERR` field.</div>"]
368 #[inline(always)]
369 pub fn ch_tx_err(&mut self, n: u8) -> CH_TX_ERR_W<INT_RAW_SPEC> {
370 #[allow(clippy::no_effect)]
371 [(); 4][n as usize];
372 CH_TX_ERR_W::new(self, n + 4)
373 }
374 #[doc = "Bit 4 - The interrupt raw bit for CHANNEL0. Triggered when error occurs."]
375 #[inline(always)]
376 pub fn ch0_tx_err(&mut self) -> CH_TX_ERR_W<INT_RAW_SPEC> {
377 CH_TX_ERR_W::new(self, 4)
378 }
379 #[doc = "Bit 5 - The interrupt raw bit for CHANNEL1. Triggered when error occurs."]
380 #[inline(always)]
381 pub fn ch1_tx_err(&mut self) -> CH_TX_ERR_W<INT_RAW_SPEC> {
382 CH_TX_ERR_W::new(self, 5)
383 }
384 #[doc = "Bit 6 - The interrupt raw bit for CHANNEL2. Triggered when error occurs."]
385 #[inline(always)]
386 pub fn ch2_tx_err(&mut self) -> CH_TX_ERR_W<INT_RAW_SPEC> {
387 CH_TX_ERR_W::new(self, 6)
388 }
389 #[doc = "Bit 7 - The interrupt raw bit for CHANNEL3. Triggered when error occurs."]
390 #[inline(always)]
391 pub fn ch3_tx_err(&mut self) -> CH_TX_ERR_W<INT_RAW_SPEC> {
392 CH_TX_ERR_W::new(self, 7)
393 }
394 #[doc = "The interrupt raw bit for CHANNEL(0-3). Triggered when transmitter sent more data than configured value."]
395 #[doc = ""]
396 #[doc = "<div class=\"warning\">`n` is number of field in register. `n == 0` corresponds to `CH0_TX_THR_EVENT` field.</div>"]
397 #[inline(always)]
398 pub fn ch_tx_thr_event(&mut self, n: u8) -> CH_TX_THR_EVENT_W<INT_RAW_SPEC> {
399 #[allow(clippy::no_effect)]
400 [(); 4][n as usize];
401 CH_TX_THR_EVENT_W::new(self, n + 8)
402 }
403 #[doc = "Bit 8 - The interrupt raw bit for CHANNEL0. Triggered when transmitter sent more data than configured value."]
404 #[inline(always)]
405 pub fn ch0_tx_thr_event(&mut self) -> CH_TX_THR_EVENT_W<INT_RAW_SPEC> {
406 CH_TX_THR_EVENT_W::new(self, 8)
407 }
408 #[doc = "Bit 9 - The interrupt raw bit for CHANNEL1. Triggered when transmitter sent more data than configured value."]
409 #[inline(always)]
410 pub fn ch1_tx_thr_event(&mut self) -> CH_TX_THR_EVENT_W<INT_RAW_SPEC> {
411 CH_TX_THR_EVENT_W::new(self, 9)
412 }
413 #[doc = "Bit 10 - The interrupt raw bit for CHANNEL2. Triggered when transmitter sent more data than configured value."]
414 #[inline(always)]
415 pub fn ch2_tx_thr_event(&mut self) -> CH_TX_THR_EVENT_W<INT_RAW_SPEC> {
416 CH_TX_THR_EVENT_W::new(self, 10)
417 }
418 #[doc = "Bit 11 - The interrupt raw bit for CHANNEL3. Triggered when transmitter sent more data than configured value."]
419 #[inline(always)]
420 pub fn ch3_tx_thr_event(&mut self) -> CH_TX_THR_EVENT_W<INT_RAW_SPEC> {
421 CH_TX_THR_EVENT_W::new(self, 11)
422 }
423 #[doc = "The interrupt raw bit for CHANNEL(0-3). Triggered when the loop count reaches the configured threshold value."]
424 #[doc = ""]
425 #[doc = "<div class=\"warning\">`n` is number of field in register. `n == 0` corresponds to `CH0_TX_LOOP` field.</div>"]
426 #[inline(always)]
427 pub fn ch_tx_loop(&mut self, n: u8) -> CH_TX_LOOP_W<INT_RAW_SPEC> {
428 #[allow(clippy::no_effect)]
429 [(); 4][n as usize];
430 CH_TX_LOOP_W::new(self, n + 12)
431 }
432 #[doc = "Bit 12 - The interrupt raw bit for CHANNEL0. Triggered when the loop count reaches the configured threshold value."]
433 #[inline(always)]
434 pub fn ch0_tx_loop(&mut self) -> CH_TX_LOOP_W<INT_RAW_SPEC> {
435 CH_TX_LOOP_W::new(self, 12)
436 }
437 #[doc = "Bit 13 - The interrupt raw bit for CHANNEL1. Triggered when the loop count reaches the configured threshold value."]
438 #[inline(always)]
439 pub fn ch1_tx_loop(&mut self) -> CH_TX_LOOP_W<INT_RAW_SPEC> {
440 CH_TX_LOOP_W::new(self, 13)
441 }
442 #[doc = "Bit 14 - The interrupt raw bit for CHANNEL2. Triggered when the loop count reaches the configured threshold value."]
443 #[inline(always)]
444 pub fn ch2_tx_loop(&mut self) -> CH_TX_LOOP_W<INT_RAW_SPEC> {
445 CH_TX_LOOP_W::new(self, 14)
446 }
447 #[doc = "Bit 15 - The interrupt raw bit for CHANNEL3. Triggered when the loop count reaches the configured threshold value."]
448 #[inline(always)]
449 pub fn ch3_tx_loop(&mut self) -> CH_TX_LOOP_W<INT_RAW_SPEC> {
450 CH_TX_LOOP_W::new(self, 15)
451 }
452 #[doc = "The interrupt raw bit for CHANNEL4. Triggered when reception done."]
453 #[doc = ""]
454 #[doc = "<div class=\"warning\">`n` is number of field in register. `n == 0` corresponds to `CH4_RX_END` field.</div>"]
455 #[inline(always)]
456 pub fn ch_rx_end(&mut self, n: u8) -> CH_RX_END_W<INT_RAW_SPEC> {
457 #[allow(clippy::no_effect)]
458 [(); 4][n as usize];
459 CH_RX_END_W::new(self, n + 16)
460 }
461 #[doc = "Bit 16 - The interrupt raw bit for CHANNEL4. Triggered when reception done."]
462 #[inline(always)]
463 pub fn ch4_rx_end(&mut self) -> CH_RX_END_W<INT_RAW_SPEC> {
464 CH_RX_END_W::new(self, 16)
465 }
466 #[doc = "Bit 17 - The interrupt raw bit for CHANNEL4. Triggered when reception done."]
467 #[inline(always)]
468 pub fn ch5_rx_end(&mut self) -> CH_RX_END_W<INT_RAW_SPEC> {
469 CH_RX_END_W::new(self, 17)
470 }
471 #[doc = "Bit 18 - The interrupt raw bit for CHANNEL4. Triggered when reception done."]
472 #[inline(always)]
473 pub fn ch6_rx_end(&mut self) -> CH_RX_END_W<INT_RAW_SPEC> {
474 CH_RX_END_W::new(self, 18)
475 }
476 #[doc = "Bit 19 - The interrupt raw bit for CHANNEL4. Triggered when reception done."]
477 #[inline(always)]
478 pub fn ch7_rx_end(&mut self) -> CH_RX_END_W<INT_RAW_SPEC> {
479 CH_RX_END_W::new(self, 19)
480 }
481 #[doc = "The interrupt raw bit for CHANNEL4. Triggered when error occurs."]
482 #[doc = ""]
483 #[doc = "<div class=\"warning\">`n` is number of field in register. `n == 0` corresponds to `CH4_RX_ERR` field.</div>"]
484 #[inline(always)]
485 pub fn ch_rx_err(&mut self, n: u8) -> CH_RX_ERR_W<INT_RAW_SPEC> {
486 #[allow(clippy::no_effect)]
487 [(); 4][n as usize];
488 CH_RX_ERR_W::new(self, n + 20)
489 }
490 #[doc = "Bit 20 - The interrupt raw bit for CHANNEL4. Triggered when error occurs."]
491 #[inline(always)]
492 pub fn ch4_rx_err(&mut self) -> CH_RX_ERR_W<INT_RAW_SPEC> {
493 CH_RX_ERR_W::new(self, 20)
494 }
495 #[doc = "Bit 21 - The interrupt raw bit for CHANNEL4. Triggered when error occurs."]
496 #[inline(always)]
497 pub fn ch5_rx_err(&mut self) -> CH_RX_ERR_W<INT_RAW_SPEC> {
498 CH_RX_ERR_W::new(self, 21)
499 }
500 #[doc = "Bit 22 - The interrupt raw bit for CHANNEL4. Triggered when error occurs."]
501 #[inline(always)]
502 pub fn ch6_rx_err(&mut self) -> CH_RX_ERR_W<INT_RAW_SPEC> {
503 CH_RX_ERR_W::new(self, 22)
504 }
505 #[doc = "Bit 23 - The interrupt raw bit for CHANNEL4. Triggered when error occurs."]
506 #[inline(always)]
507 pub fn ch7_rx_err(&mut self) -> CH_RX_ERR_W<INT_RAW_SPEC> {
508 CH_RX_ERR_W::new(self, 23)
509 }
510 #[doc = "The interrupt raw bit for CHANNEL4. Triggered when receiver receive more data than configured value."]
511 #[doc = ""]
512 #[doc = "<div class=\"warning\">`n` is number of field in register. `n == 0` corresponds to `CH4_RX_THR_EVENT` field.</div>"]
513 #[inline(always)]
514 pub fn ch_rx_thr_event(&mut self, n: u8) -> CH_RX_THR_EVENT_W<INT_RAW_SPEC> {
515 #[allow(clippy::no_effect)]
516 [(); 4][n as usize];
517 CH_RX_THR_EVENT_W::new(self, n + 24)
518 }
519 #[doc = "Bit 24 - The interrupt raw bit for CHANNEL4. Triggered when receiver receive more data than configured value."]
520 #[inline(always)]
521 pub fn ch4_rx_thr_event(&mut self) -> CH_RX_THR_EVENT_W<INT_RAW_SPEC> {
522 CH_RX_THR_EVENT_W::new(self, 24)
523 }
524 #[doc = "Bit 25 - The interrupt raw bit for CHANNEL4. Triggered when receiver receive more data than configured value."]
525 #[inline(always)]
526 pub fn ch5_rx_thr_event(&mut self) -> CH_RX_THR_EVENT_W<INT_RAW_SPEC> {
527 CH_RX_THR_EVENT_W::new(self, 25)
528 }
529 #[doc = "Bit 26 - The interrupt raw bit for CHANNEL4. Triggered when receiver receive more data than configured value."]
530 #[inline(always)]
531 pub fn ch6_rx_thr_event(&mut self) -> CH_RX_THR_EVENT_W<INT_RAW_SPEC> {
532 CH_RX_THR_EVENT_W::new(self, 26)
533 }
534 #[doc = "Bit 27 - The interrupt raw bit for CHANNEL4. Triggered when receiver receive more data than configured value."]
535 #[inline(always)]
536 pub fn ch7_rx_thr_event(&mut self) -> CH_RX_THR_EVENT_W<INT_RAW_SPEC> {
537 CH_RX_THR_EVENT_W::new(self, 27)
538 }
539 #[doc = "Bit 28 - The interrupt raw bit for CHANNEL3. Triggered when dma accessing CHANNEL3 fails."]
540 #[inline(always)]
541 pub fn tx_ch3_dma_access_fail(&mut self) -> TX_CH3_DMA_ACCESS_FAIL_W<INT_RAW_SPEC> {
542 TX_CH3_DMA_ACCESS_FAIL_W::new(self, 28)
543 }
544 #[doc = "Bit 29 - The interrupt raw bit for CHANNEL7. Triggered when dma accessing CHANNEL7 fails."]
545 #[inline(always)]
546 pub fn rx_ch7_dma_access_fail(&mut self) -> RX_CH7_DMA_ACCESS_FAIL_W<INT_RAW_SPEC> {
547 RX_CH7_DMA_ACCESS_FAIL_W::new(self, 29)
548 }
549}
550#[doc = "Raw interrupt status\n\nYou can [`read`](crate::Reg::read) this register and get [`int_raw::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`int_raw::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
551pub struct INT_RAW_SPEC;
552impl crate::RegisterSpec for INT_RAW_SPEC {
553 type Ux = u32;
554}
555#[doc = "`read()` method returns [`int_raw::R`](R) reader structure"]
556impl crate::Readable for INT_RAW_SPEC {}
557#[doc = "`write(|w| ..)` method takes [`int_raw::W`](W) writer structure"]
558impl crate::Writable for INT_RAW_SPEC {
559 type Safety = crate::Unsafe;
560 const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
561 const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
562}
563#[doc = "`reset()` method sets INT_RAW to value 0"]
564impl crate::Resettable for INT_RAW_SPEC {
565 const RESET_VALUE: u32 = 0;
566}