esp32s3/interrupt_core1/
systimer_target2_int_map.rs

1#[doc = "Register `SYSTIMER_TARGET2_INT_MAP` reader"]
2pub type R = crate::R<SYSTIMER_TARGET2_INT_MAP_SPEC>;
3#[doc = "Register `SYSTIMER_TARGET2_INT_MAP` writer"]
4pub type W = crate::W<SYSTIMER_TARGET2_INT_MAP_SPEC>;
5#[doc = "Field `SYSTIMER_TARGET2_INT_MAP` reader - this register used to map systimer_target2 interrupt to one of core1's external interrupt"]
6pub type SYSTIMER_TARGET2_INT_MAP_R = crate::FieldReader;
7#[doc = "Field `SYSTIMER_TARGET2_INT_MAP` writer - this register used to map systimer_target2 interrupt to one of core1's external interrupt"]
8pub type SYSTIMER_TARGET2_INT_MAP_W<'a, REG> = crate::FieldWriter<'a, REG, 5>;
9impl R {
10    #[doc = "Bits 0:4 - this register used to map systimer_target2 interrupt to one of core1's external interrupt"]
11    #[inline(always)]
12    pub fn systimer_target2_int_map(&self) -> SYSTIMER_TARGET2_INT_MAP_R {
13        SYSTIMER_TARGET2_INT_MAP_R::new((self.bits & 0x1f) as u8)
14    }
15}
16#[cfg(feature = "impl-register-debug")]
17impl core::fmt::Debug for R {
18    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
19        f.debug_struct("SYSTIMER_TARGET2_INT_MAP")
20            .field("systimer_target2_int_map", &self.systimer_target2_int_map())
21            .finish()
22    }
23}
24impl W {
25    #[doc = "Bits 0:4 - this register used to map systimer_target2 interrupt to one of core1's external interrupt"]
26    #[inline(always)]
27    pub fn systimer_target2_int_map(
28        &mut self,
29    ) -> SYSTIMER_TARGET2_INT_MAP_W<SYSTIMER_TARGET2_INT_MAP_SPEC> {
30        SYSTIMER_TARGET2_INT_MAP_W::new(self, 0)
31    }
32}
33#[doc = "systimer_target2 interrupt configuration register\n\nYou can [`read`](crate::Reg::read) this register and get [`systimer_target2_int_map::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`systimer_target2_int_map::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
34pub struct SYSTIMER_TARGET2_INT_MAP_SPEC;
35impl crate::RegisterSpec for SYSTIMER_TARGET2_INT_MAP_SPEC {
36    type Ux = u32;
37}
38#[doc = "`read()` method returns [`systimer_target2_int_map::R`](R) reader structure"]
39impl crate::Readable for SYSTIMER_TARGET2_INT_MAP_SPEC {}
40#[doc = "`write(|w| ..)` method takes [`systimer_target2_int_map::W`](W) writer structure"]
41impl crate::Writable for SYSTIMER_TARGET2_INT_MAP_SPEC {
42    type Safety = crate::Unsafe;
43    const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
44    const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
45}
46#[doc = "`reset()` method sets SYSTIMER_TARGET2_INT_MAP to value 0x10"]
47impl crate::Resettable for SYSTIMER_TARGET2_INT_MAP_SPEC {
48    const RESET_VALUE: u32 = 0x10;
49}
esp32s3/interrupt_core1/systimer_target2_int_map.rs

esp32s3/interrupt_core1/
systimer_target2_int_map.rs
