esp32s3/extmem/
cache_state.rs

1#[doc = "Register `CACHE_STATE` reader"]
2pub type R = crate::R<CACHE_STATE_SPEC>;
3#[doc = "Field `ICACHE_STATE` reader - The bit is used to indicate whether icache main fsm is in idle state or not. 1: in idle state, 0: not in idle state"]
4pub type ICACHE_STATE_R = crate::FieldReader<u16>;
5#[doc = "Field `DCACHE_STATE` reader - The bit is used to indicate whether dcache main fsm is in idle state or not. 1: in idle state, 0: not in idle state"]
6pub type DCACHE_STATE_R = crate::FieldReader<u16>;
7impl R {
8    #[doc = "Bits 0:11 - The bit is used to indicate whether icache main fsm is in idle state or not. 1: in idle state, 0: not in idle state"]
9    #[inline(always)]
10    pub fn icache_state(&self) -> ICACHE_STATE_R {
11        ICACHE_STATE_R::new((self.bits & 0x0fff) as u16)
12    }
13    #[doc = "Bits 12:23 - The bit is used to indicate whether dcache main fsm is in idle state or not. 1: in idle state, 0: not in idle state"]
14    #[inline(always)]
15    pub fn dcache_state(&self) -> DCACHE_STATE_R {
16        DCACHE_STATE_R::new(((self.bits >> 12) & 0x0fff) as u16)
17    }
18}
19#[cfg(feature = "impl-register-debug")]
20impl core::fmt::Debug for R {
21    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
22        f.debug_struct("CACHE_STATE")
23            .field("icache_state", &self.icache_state())
24            .field("dcache_state", &self.dcache_state())
25            .finish()
26    }
27}
28#[doc = "******* Description ***********\n\nYou can [`read`](crate::Reg::read) this register and get [`cache_state::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
29pub struct CACHE_STATE_SPEC;
30impl crate::RegisterSpec for CACHE_STATE_SPEC {
31    type Ux = u32;
32}
33#[doc = "`read()` method returns [`cache_state::R`](R) reader structure"]
34impl crate::Readable for CACHE_STATE_SPEC {}
35#[doc = "`reset()` method sets CACHE_STATE to value 0"]
36impl crate::Resettable for CACHE_STATE_SPEC {
37    const RESET_VALUE: u32 = 0;
38}
esp32s3/extmem/cache_state.rs

esp32s3/extmem/
cache_state.rs
