pub struct RMT { /* private fields */ }
Expand description
Remote Control
Implementations§
Source§impl RMT
impl RMT
Sourcepub const PTR: *const RegisterBlock = {0x60016000 as *const rmt::RegisterBlock}
pub const PTR: *const RegisterBlock = {0x60016000 as *const rmt::RegisterBlock}
Pointer to the register block
Sourcepub const fn ptr() -> *const RegisterBlock
pub const fn ptr() -> *const RegisterBlock
Return the pointer to the register block
Sourcepub unsafe fn steal() -> Self
pub unsafe fn steal() -> Self
Steal an instance of this peripheral
§Safety
Ensure that the new instance of the peripheral cannot be used in a way that may race with any existing instances, for example by only accessing read-only or write-only registers, or by consuming the original peripheral and using critical sections to coordinate access between multiple new instances.
Additionally, other software such as HALs may rely on only one peripheral instance existing to ensure memory safety; ensure no stolen instances are passed to such software.
Methods from Deref<Target = RegisterBlock>§
Sourcepub fn chdata(&self, n: usize) -> &CHDATA
pub fn chdata(&self, n: usize) -> &CHDATA
0x00..0x20 - The read and write data register for CHANNEL%s by apb fifo access.
Sourcepub fn chdata_iter(&self) -> impl Iterator<Item = &CHDATA>
pub fn chdata_iter(&self) -> impl Iterator<Item = &CHDATA>
Iterator for array of: 0x00..0x20 - The read and write data register for CHANNEL%s by apb fifo access.
Sourcepub fn ch0data(&self) -> &CHDATA
pub fn ch0data(&self) -> &CHDATA
0x00 - The read and write data register for CHANNEL0 by apb fifo access.
Sourcepub fn ch1data(&self) -> &CHDATA
pub fn ch1data(&self) -> &CHDATA
0x04 - The read and write data register for CHANNEL1 by apb fifo access.
Sourcepub fn ch2data(&self) -> &CHDATA
pub fn ch2data(&self) -> &CHDATA
0x08 - The read and write data register for CHANNEL2 by apb fifo access.
Sourcepub fn ch3data(&self) -> &CHDATA
pub fn ch3data(&self) -> &CHDATA
0x0c - The read and write data register for CHANNEL3 by apb fifo access.
Sourcepub fn ch4data(&self) -> &CHDATA
pub fn ch4data(&self) -> &CHDATA
0x10 - The read and write data register for CHANNEL4 by apb fifo access.
Sourcepub fn ch5data(&self) -> &CHDATA
pub fn ch5data(&self) -> &CHDATA
0x14 - The read and write data register for CHANNEL5 by apb fifo access.
Sourcepub fn ch6data(&self) -> &CHDATA
pub fn ch6data(&self) -> &CHDATA
0x18 - The read and write data register for CHANNEL6 by apb fifo access.
Sourcepub fn ch7data(&self) -> &CHDATA
pub fn ch7data(&self) -> &CHDATA
0x1c - The read and write data register for CHANNEL7 by apb fifo access.
Sourcepub fn ch_tx_conf0(&self, n: usize) -> &CH_TX_CONF0
pub fn ch_tx_conf0(&self, n: usize) -> &CH_TX_CONF0
0x20..0x30 - Channel %s configure register 0
Sourcepub fn ch_tx_conf0_iter(&self) -> impl Iterator<Item = &CH_TX_CONF0>
pub fn ch_tx_conf0_iter(&self) -> impl Iterator<Item = &CH_TX_CONF0>
Iterator for array of: 0x20..0x30 - Channel %s configure register 0
Sourcepub fn ch0_tx_conf0(&self) -> &CH_TX_CONF0
pub fn ch0_tx_conf0(&self) -> &CH_TX_CONF0
0x20 - Channel 0 configure register 0
Sourcepub fn ch1_tx_conf0(&self) -> &CH_TX_CONF0
pub fn ch1_tx_conf0(&self) -> &CH_TX_CONF0
0x24 - Channel 1 configure register 0
Sourcepub fn ch2_tx_conf0(&self) -> &CH_TX_CONF0
pub fn ch2_tx_conf0(&self) -> &CH_TX_CONF0
0x28 - Channel 2 configure register 0
Sourcepub fn ch3_tx_conf0(&self) -> &CH_TX_CONF0
pub fn ch3_tx_conf0(&self) -> &CH_TX_CONF0
0x2c - Channel 3 configure register 0
Sourcepub fn ch_rx_conf0(&self, n: usize) -> &CH_RX_CONF0
pub fn ch_rx_conf0(&self, n: usize) -> &CH_RX_CONF0
0x30..0x40 - Channel %s configure register 0
Sourcepub fn ch_rx_conf0_iter(&self) -> impl Iterator<Item = &CH_RX_CONF0>
pub fn ch_rx_conf0_iter(&self) -> impl Iterator<Item = &CH_RX_CONF0>
Iterator for array of: 0x30..0x40 - Channel %s configure register 0
Sourcepub fn ch4_rx_conf0(&self) -> &CH_RX_CONF0
pub fn ch4_rx_conf0(&self) -> &CH_RX_CONF0
0x30 - Channel 4 configure register 0
Sourcepub fn ch5_rx_conf0(&self) -> &CH_RX_CONF0
pub fn ch5_rx_conf0(&self) -> &CH_RX_CONF0
0x38 - Channel 5 configure register 0
Sourcepub fn ch6_rx_conf0(&self) -> &CH_RX_CONF0
pub fn ch6_rx_conf0(&self) -> &CH_RX_CONF0
0x40 - Channel 6 configure register 0
Sourcepub fn ch7_rx_conf0(&self) -> &CH_RX_CONF0
pub fn ch7_rx_conf0(&self) -> &CH_RX_CONF0
0x48 - Channel 7 configure register 0
Sourcepub fn ch_rx_conf1(&self, n: usize) -> &CH_RX_CONF1
pub fn ch_rx_conf1(&self, n: usize) -> &CH_RX_CONF1
0x34..0x44 - Channel %s configure register 1
Sourcepub fn ch_rx_conf1_iter(&self) -> impl Iterator<Item = &CH_RX_CONF1>
pub fn ch_rx_conf1_iter(&self) -> impl Iterator<Item = &CH_RX_CONF1>
Iterator for array of: 0x34..0x44 - Channel %s configure register 1
Sourcepub fn ch4_rx_conf1(&self) -> &CH_RX_CONF1
pub fn ch4_rx_conf1(&self) -> &CH_RX_CONF1
0x34 - Channel 4 configure register 1
Sourcepub fn ch5_rx_conf1(&self) -> &CH_RX_CONF1
pub fn ch5_rx_conf1(&self) -> &CH_RX_CONF1
0x3c - Channel 5 configure register 1
Sourcepub fn ch6_rx_conf1(&self) -> &CH_RX_CONF1
pub fn ch6_rx_conf1(&self) -> &CH_RX_CONF1
0x44 - Channel 6 configure register 1
Sourcepub fn ch7_rx_conf1(&self) -> &CH_RX_CONF1
pub fn ch7_rx_conf1(&self) -> &CH_RX_CONF1
0x4c - Channel 7 configure register 1
Sourcepub fn ch_tx_status(&self, n: usize) -> &CH_TX_STATUS
pub fn ch_tx_status(&self, n: usize) -> &CH_TX_STATUS
0x50..0x60 - Channel %s status register
Sourcepub fn ch_tx_status_iter(&self) -> impl Iterator<Item = &CH_TX_STATUS>
pub fn ch_tx_status_iter(&self) -> impl Iterator<Item = &CH_TX_STATUS>
Iterator for array of: 0x50..0x60 - Channel %s status register
Sourcepub fn ch0_tx_status(&self) -> &CH_TX_STATUS
pub fn ch0_tx_status(&self) -> &CH_TX_STATUS
0x50 - Channel 0 status register
Sourcepub fn ch1_tx_status(&self) -> &CH_TX_STATUS
pub fn ch1_tx_status(&self) -> &CH_TX_STATUS
0x54 - Channel 1 status register
Sourcepub fn ch2_tx_status(&self) -> &CH_TX_STATUS
pub fn ch2_tx_status(&self) -> &CH_TX_STATUS
0x58 - Channel 2 status register
Sourcepub fn ch3_tx_status(&self) -> &CH_TX_STATUS
pub fn ch3_tx_status(&self) -> &CH_TX_STATUS
0x5c - Channel 3 status register
Sourcepub fn ch_rx_status(&self, n: usize) -> &CH_RX_STATUS
pub fn ch_rx_status(&self, n: usize) -> &CH_RX_STATUS
0x60..0x70 - Channel %s status register
Sourcepub fn ch_rx_status_iter(&self) -> impl Iterator<Item = &CH_RX_STATUS>
pub fn ch_rx_status_iter(&self) -> impl Iterator<Item = &CH_RX_STATUS>
Iterator for array of: 0x60..0x70 - Channel %s status register
Sourcepub fn ch0_rx_status(&self) -> &CH_RX_STATUS
pub fn ch0_rx_status(&self) -> &CH_RX_STATUS
0x60 - Channel 0 status register
Sourcepub fn ch1_rx_status(&self) -> &CH_RX_STATUS
pub fn ch1_rx_status(&self) -> &CH_RX_STATUS
0x64 - Channel 1 status register
Sourcepub fn ch2_rx_status(&self) -> &CH_RX_STATUS
pub fn ch2_rx_status(&self) -> &CH_RX_STATUS
0x68 - Channel 2 status register
Sourcepub fn ch3_rx_status(&self) -> &CH_RX_STATUS
pub fn ch3_rx_status(&self) -> &CH_RX_STATUS
0x6c - Channel 3 status register
Sourcepub fn chcarrier_duty(&self, n: usize) -> &CHCARRIER_DUTY
pub fn chcarrier_duty(&self, n: usize) -> &CHCARRIER_DUTY
0x80..0x90 - Channel %s duty cycle configuration register
Sourcepub fn chcarrier_duty_iter(&self) -> impl Iterator<Item = &CHCARRIER_DUTY>
pub fn chcarrier_duty_iter(&self) -> impl Iterator<Item = &CHCARRIER_DUTY>
Iterator for array of: 0x80..0x90 - Channel %s duty cycle configuration register
Sourcepub fn ch0carrier_duty(&self) -> &CHCARRIER_DUTY
pub fn ch0carrier_duty(&self) -> &CHCARRIER_DUTY
0x80 - Channel 0 duty cycle configuration register
Sourcepub fn ch1carrier_duty(&self) -> &CHCARRIER_DUTY
pub fn ch1carrier_duty(&self) -> &CHCARRIER_DUTY
0x84 - Channel 1 duty cycle configuration register
Sourcepub fn ch2carrier_duty(&self) -> &CHCARRIER_DUTY
pub fn ch2carrier_duty(&self) -> &CHCARRIER_DUTY
0x88 - Channel 2 duty cycle configuration register
Sourcepub fn ch3carrier_duty(&self) -> &CHCARRIER_DUTY
pub fn ch3carrier_duty(&self) -> &CHCARRIER_DUTY
0x8c - Channel 3 duty cycle configuration register
Sourcepub fn ch_rx_carrier_rm(&self, n: usize) -> &CH_RX_CARRIER_RM
pub fn ch_rx_carrier_rm(&self, n: usize) -> &CH_RX_CARRIER_RM
0x90..0xa0 - Channel %s carrier remove register
Sourcepub fn ch_rx_carrier_rm_iter(&self) -> impl Iterator<Item = &CH_RX_CARRIER_RM>
pub fn ch_rx_carrier_rm_iter(&self) -> impl Iterator<Item = &CH_RX_CARRIER_RM>
Iterator for array of: 0x90..0xa0 - Channel %s carrier remove register
Sourcepub fn ch0_rx_carrier_rm(&self) -> &CH_RX_CARRIER_RM
pub fn ch0_rx_carrier_rm(&self) -> &CH_RX_CARRIER_RM
0x90 - Channel 0 carrier remove register
Sourcepub fn ch1_rx_carrier_rm(&self) -> &CH_RX_CARRIER_RM
pub fn ch1_rx_carrier_rm(&self) -> &CH_RX_CARRIER_RM
0x94 - Channel 1 carrier remove register
Sourcepub fn ch2_rx_carrier_rm(&self) -> &CH_RX_CARRIER_RM
pub fn ch2_rx_carrier_rm(&self) -> &CH_RX_CARRIER_RM
0x98 - Channel 2 carrier remove register
Sourcepub fn ch3_rx_carrier_rm(&self) -> &CH_RX_CARRIER_RM
pub fn ch3_rx_carrier_rm(&self) -> &CH_RX_CARRIER_RM
0x9c - Channel 3 carrier remove register
Sourcepub fn ch_tx_lim(&self, n: usize) -> &CH_TX_LIM
pub fn ch_tx_lim(&self, n: usize) -> &CH_TX_LIM
0xa0..0xb0 - Channel %s Tx event configuration register
Sourcepub fn ch_tx_lim_iter(&self) -> impl Iterator<Item = &CH_TX_LIM>
pub fn ch_tx_lim_iter(&self) -> impl Iterator<Item = &CH_TX_LIM>
Iterator for array of: 0xa0..0xb0 - Channel %s Tx event configuration register
Sourcepub fn ch0_tx_lim(&self) -> &CH_TX_LIM
pub fn ch0_tx_lim(&self) -> &CH_TX_LIM
0xa0 - Channel 0 Tx event configuration register
Sourcepub fn ch1_tx_lim(&self) -> &CH_TX_LIM
pub fn ch1_tx_lim(&self) -> &CH_TX_LIM
0xa4 - Channel 1 Tx event configuration register
Sourcepub fn ch2_tx_lim(&self) -> &CH_TX_LIM
pub fn ch2_tx_lim(&self) -> &CH_TX_LIM
0xa8 - Channel 2 Tx event configuration register
Sourcepub fn ch3_tx_lim(&self) -> &CH_TX_LIM
pub fn ch3_tx_lim(&self) -> &CH_TX_LIM
0xac - Channel 3 Tx event configuration register
Sourcepub fn ch_rx_lim(&self, n: usize) -> &CH_RX_LIM
pub fn ch_rx_lim(&self, n: usize) -> &CH_RX_LIM
0xb0..0xc0 - Channel %s Rx event configuration register
Sourcepub fn ch_rx_lim_iter(&self) -> impl Iterator<Item = &CH_RX_LIM>
pub fn ch_rx_lim_iter(&self) -> impl Iterator<Item = &CH_RX_LIM>
Iterator for array of: 0xb0..0xc0 - Channel %s Rx event configuration register
Sourcepub fn ch0_rx_lim(&self) -> &CH_RX_LIM
pub fn ch0_rx_lim(&self) -> &CH_RX_LIM
0xb0 - Channel 0 Rx event configuration register
Sourcepub fn ch1_rx_lim(&self) -> &CH_RX_LIM
pub fn ch1_rx_lim(&self) -> &CH_RX_LIM
0xb4 - Channel 1 Rx event configuration register
Sourcepub fn ch2_rx_lim(&self) -> &CH_RX_LIM
pub fn ch2_rx_lim(&self) -> &CH_RX_LIM
0xb8 - Channel 2 Rx event configuration register
Sourcepub fn ch3_rx_lim(&self) -> &CH_RX_LIM
pub fn ch3_rx_lim(&self) -> &CH_RX_LIM
0xbc - Channel 3 Rx event configuration register
Sourcepub fn ref_cnt_rst(&self) -> &REF_CNT_RST
pub fn ref_cnt_rst(&self) -> &REF_CNT_RST
0xc8 - RMT clock divider reset register