Module clock_gate

Source
Expand description

SPI0 clk_gate register

Structs§

CLOCK_GATE_SPEC
SPI0 clk_gate register

Type Aliases§

CLK_EN_R
Field CLK_EN reader - Register clock gate enable signal. 1: Enable. 0: Disable.
CLK_EN_W
Field CLK_EN writer - Register clock gate enable signal. 1: Enable. 0: Disable.
R
Register CLOCK_GATE reader
W
Register CLOCK_GATE writer