esp32s3/interrupt_core1/
dma_out_ch0_int_map.rs

1#[doc = "Register `DMA_OUT_CH0_INT_MAP` reader"]
2pub type R = crate::R<DMA_OUT_CH0_INT_MAP_SPEC>;
3#[doc = "Register `DMA_OUT_CH0_INT_MAP` writer"]
4pub type W = crate::W<DMA_OUT_CH0_INT_MAP_SPEC>;
5#[doc = "Field `DMA_OUT_CH0_INT_MAP` reader - this register used to map dma_out_ch0 interrupt to one of core1's external interrupt"]
6pub type DMA_OUT_CH0_INT_MAP_R = crate::FieldReader;
7#[doc = "Field `DMA_OUT_CH0_INT_MAP` writer - this register used to map dma_out_ch0 interrupt to one of core1's external interrupt"]
8pub type DMA_OUT_CH0_INT_MAP_W<'a, REG> = crate::FieldWriter<'a, REG, 5>;
9impl R {
10    #[doc = "Bits 0:4 - this register used to map dma_out_ch0 interrupt to one of core1's external interrupt"]
11    #[inline(always)]
12    pub fn dma_out_ch0_int_map(&self) -> DMA_OUT_CH0_INT_MAP_R {
13        DMA_OUT_CH0_INT_MAP_R::new((self.bits & 0x1f) as u8)
14    }
15}
16#[cfg(feature = "impl-register-debug")]
17impl core::fmt::Debug for R {
18    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
19        f.debug_struct("DMA_OUT_CH0_INT_MAP")
20            .field("dma_out_ch0_int_map", &self.dma_out_ch0_int_map())
21            .finish()
22    }
23}
24impl W {
25    #[doc = "Bits 0:4 - this register used to map dma_out_ch0 interrupt to one of core1's external interrupt"]
26    #[inline(always)]
27    pub fn dma_out_ch0_int_map(&mut self) -> DMA_OUT_CH0_INT_MAP_W<DMA_OUT_CH0_INT_MAP_SPEC> {
28        DMA_OUT_CH0_INT_MAP_W::new(self, 0)
29    }
30}
31#[doc = "dma_out_ch0 interrupt configuration register\n\nYou can [`read`](crate::Reg::read) this register and get [`dma_out_ch0_int_map::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dma_out_ch0_int_map::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
32pub struct DMA_OUT_CH0_INT_MAP_SPEC;
33impl crate::RegisterSpec for DMA_OUT_CH0_INT_MAP_SPEC {
34    type Ux = u32;
35}
36#[doc = "`read()` method returns [`dma_out_ch0_int_map::R`](R) reader structure"]
37impl crate::Readable for DMA_OUT_CH0_INT_MAP_SPEC {}
38#[doc = "`write(|w| ..)` method takes [`dma_out_ch0_int_map::W`](W) writer structure"]
39impl crate::Writable for DMA_OUT_CH0_INT_MAP_SPEC {
40    type Safety = crate::Unsafe;
41    const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
42    const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
43}
44#[doc = "`reset()` method sets DMA_OUT_CH0_INT_MAP to value 0x10"]
45impl crate::Resettable for DMA_OUT_CH0_INT_MAP_SPEC {
46    const RESET_VALUE: u32 = 0x10;
47}
esp32s3/interrupt_core1/dma_out_ch0_int_map.rs

esp32s3/interrupt_core1/
dma_out_ch0_int_map.rs
