Module core0_acs_cache_int_clr

Source
Expand description

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Structs§

CORE0_ACS_CACHE_INT_CLR_SPEC
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Type Aliases§

CORE0_DBUS_ACS_MSK_DC_W
Field CORE0_DBUS_ACS_MSK_DC writer - The bit is used to clear interrupt by cpu access dcache while the corresponding dbus is disabled or dcache is disabled which include speculative access.
CORE0_DBUS_REJECT_W
Field CORE0_DBUS_REJECT writer - The bit is used to clear interrupt by authentication fail.
CORE0_IBUS_ACS_MSK_IC_W
Field CORE0_IBUS_ACS_MSK_IC writer - The bit is used to clear interrupt by cpu access icache while the corresponding ibus is disabled or icache is disabled which include speculative access.
CORE0_IBUS_REJECT_W
Field CORE0_IBUS_REJECT writer - The bit is used to clear interrupt by authentication fail.
CORE0_IBUS_WR_IC_W
Field CORE0_IBUS_WR_IC writer - The bit is used to clear interrupt by ibus trying to write icache
W
Register CORE0_ACS_CACHE_INT_CLR writer