Expand description
******* Description ***********
Structs§
- CORE0_
ACS_ CACHE_ INT_ CLR_ SPEC - ******* Description ***********
Type Aliases§
- CORE0_
DBUS_ ACS_ MSK_ DC_ W - Field
CORE0_DBUS_ACS_MSK_DC
writer - The bit is used to clear interrupt by cpu access dcache while the corresponding dbus is disabled or dcache is disabled which include speculative access. - CORE0_
DBUS_ REJECT_ W - Field
CORE0_DBUS_REJECT
writer - The bit is used to clear interrupt by authentication fail. - CORE0_
IBUS_ ACS_ MSK_ IC_ W - Field
CORE0_IBUS_ACS_MSK_IC
writer - The bit is used to clear interrupt by cpu access icache while the corresponding ibus is disabled or icache is disabled which include speculative access. - CORE0_
IBUS_ REJECT_ W - Field
CORE0_IBUS_REJECT
writer - The bit is used to clear interrupt by authentication fail. - CORE0_
IBUS_ WR_ IC_ W - Field
CORE0_IBUS_WR_IC
writer - The bit is used to clear interrupt by ibus trying to write icache - W
- Register
CORE0_ACS_CACHE_INT_CLR
writer