Struct esp32s3::interrupt_core0::RegisterBlock

source ·

#[repr(C)]
pub struct RegisterBlock {Show 105 fields
    pub pro_mac_intr_map: PRO_MAC_INTR_MAP,
    pub mac_nmi_map: MAC_NMI_MAP,
    pub pwr_intr_map: PWR_INTR_MAP,
    pub bb_int_map: BB_INT_MAP,
    pub bt_mac_int_map: BT_MAC_INT_MAP,
    pub bt_bb_int_map: BT_BB_INT_MAP,
    pub bt_bb_nmi_map: BT_BB_NMI_MAP,
    pub rwbt_irq_map: RWBT_IRQ_MAP,
    pub rwble_irq_map: RWBLE_IRQ_MAP,
    pub rwbt_nmi_map: RWBT_NMI_MAP,
    pub rwble_nmi_map: RWBLE_NMI_MAP,
    pub i2c_mst_int_map: I2C_MST_INT_MAP,
    pub slc0_intr_map: SLC0_INTR_MAP,
    pub slc1_intr_map: SLC1_INTR_MAP,
    pub uhci0_intr_map: UHCI0_INTR_MAP,
    pub uhci1_intr_map: UHCI1_INTR_MAP,
    pub gpio_interrupt_pro_map: GPIO_INTERRUPT_PRO_MAP,
    pub gpio_interrupt_pro_nmi_map: GPIO_INTERRUPT_PRO_NMI_MAP,
    pub gpio_interrupt_app_map: GPIO_INTERRUPT_APP_MAP,
    pub gpio_interrupt_app_nmi_map: GPIO_INTERRUPT_APP_NMI_MAP,
    pub spi_intr_1_map: SPI_INTR_1_MAP,
    pub spi_intr_2_map: SPI_INTR_2_MAP,
    pub spi_intr_3_map: SPI_INTR_3_MAP,
    pub spi_intr_4_map: SPI_INTR_4_MAP,
    pub lcd_cam_int_map: LCD_CAM_INT_MAP,
    pub i2s0_int_map: I2S0_INT_MAP,
    pub i2s1_int_map: I2S1_INT_MAP,
    pub uart_intr_map: UART_INTR_MAP,
    pub uart1_intr_map: UART1_INTR_MAP,
    pub uart2_intr_map: UART2_INTR_MAP,
    pub sdio_host_interrupt_map: SDIO_HOST_INTERRUPT_MAP,
    pub pwm0_intr_map: PWM0_INTR_MAP,
    pub pwm1_intr_map: PWM1_INTR_MAP,
    pub pwm2_intr_map: PWM2_INTR_MAP,
    pub pwm3_intr_map: PWM3_INTR_MAP,
    pub ledc_int_map: LEDC_INT_MAP,
    pub efuse_int_map: EFUSE_INT_MAP,
    pub can_int_map: CAN_INT_MAP,
    pub usb_intr_map: USB_INTR_MAP,
    pub rtc_core_intr_map: RTC_CORE_INTR_MAP,
    pub rmt_intr_map: RMT_INTR_MAP,
    pub pcnt_intr_map: PCNT_INTR_MAP,
    pub i2c_ext0_intr_map: I2C_EXT0_INTR_MAP,
    pub i2c_ext1_intr_map: I2C_EXT1_INTR_MAP,
    pub spi2_dma_int_map: SPI2_DMA_INT_MAP,
    pub spi3_dma_int_map: SPI3_DMA_INT_MAP,
    pub spi4_dma_int_map: SPI4_DMA_INT_MAP,
    pub wdg_int_map: WDG_INT_MAP,
    pub timer_int1_map: TIMER_INT1_MAP,
    pub timer_int2_map: TIMER_INT2_MAP,
    pub tg_t0_int_map: TG_T0_INT_MAP,
    pub tg_t1_int_map: TG_T1_INT_MAP,
    pub tg_wdt_int_map: TG_WDT_INT_MAP,
    pub tg1_t0_int_map: TG1_T0_INT_MAP,
    pub tg1_t1_int_map: TG1_T1_INT_MAP,
    pub tg1_wdt_int_map: TG1_WDT_INT_MAP,
    pub cache_ia_int_map: CACHE_IA_INT_MAP,
    pub systimer_target0_int_map: SYSTIMER_TARGET0_INT_MAP,
    pub systimer_target1_int_map: SYSTIMER_TARGET1_INT_MAP,
    pub systimer_target2_int_map: SYSTIMER_TARGET2_INT_MAP,
    pub spi_mem_reject_intr_map: SPI_MEM_REJECT_INTR_MAP,
    pub dcache_preload_int_map: DCACHE_PRELOAD_INT_MAP,
    pub icache_preload_int_map: ICACHE_PRELOAD_INT_MAP,
    pub dcache_sync_int_map: DCACHE_SYNC_INT_MAP,
    pub icache_sync_int_map: ICACHE_SYNC_INT_MAP,
    pub apb_adc_int_map: APB_ADC_INT_MAP,
    pub dma_in_ch0_int_map: DMA_IN_CH0_INT_MAP,
    pub dma_in_ch1_int_map: DMA_IN_CH1_INT_MAP,
    pub dma_in_ch2_int_map: DMA_IN_CH2_INT_MAP,
    pub dma_in_ch3_int_map: DMA_IN_CH3_INT_MAP,
    pub dma_in_ch4_int_map: DMA_IN_CH4_INT_MAP,
    pub dma_out_ch0_int_map: DMA_OUT_CH0_INT_MAP,
    pub dma_out_ch1_int_map: DMA_OUT_CH1_INT_MAP,
    pub dma_out_ch2_int_map: DMA_OUT_CH2_INT_MAP,
    pub dma_out_ch3_int_map: DMA_OUT_CH3_INT_MAP,
    pub dma_out_ch4_int_map: DMA_OUT_CH4_INT_MAP,
    pub rsa_int_map: RSA_INT_MAP,
    pub aes_int_map: AES_INT_MAP,
    pub sha_int_map: SHA_INT_MAP,
    pub cpu_intr_from_cpu_0_map: CPU_INTR_FROM_CPU_0_MAP,
    pub cpu_intr_from_cpu_1_map: CPU_INTR_FROM_CPU_1_MAP,
    pub cpu_intr_from_cpu_2_map: CPU_INTR_FROM_CPU_2_MAP,
    pub cpu_intr_from_cpu_3_map: CPU_INTR_FROM_CPU_3_MAP,
    pub assist_debug_intr_map: ASSIST_DEBUG_INTR_MAP,
    pub dma_apbperi_pms_monitor_violate_intr_map: DMA_APBPERI_PMS_MONITOR_VIOLATE_INTR_MAP,
    pub core_0_iram0_pms_monitor_violate_intr_map: CORE_0_IRAM0_PMS_MONITOR_VIOLATE_INTR_MAP,
    pub core_0_dram0_pms_monitor_violate_intr_map: CORE_0_DRAM0_PMS_MONITOR_VIOLATE_INTR_MAP,
    pub core_0_pif_pms_monitor_violate_intr_map: CORE_0_PIF_PMS_MONITOR_VIOLATE_INTR_MAP,
    pub core_0_pif_pms_monitor_violate_size_intr_map: CORE_0_PIF_PMS_MONITOR_VIOLATE_SIZE_INTR_MAP,
    pub core_1_iram0_pms_monitor_violate_intr_map: CORE_1_IRAM0_PMS_MONITOR_VIOLATE_INTR_MAP,
    pub core_1_dram0_pms_monitor_violate_intr_map: CORE_1_DRAM0_PMS_MONITOR_VIOLATE_INTR_MAP,
    pub core_1_pif_pms_monitor_violate_intr_map: CORE_1_PIF_PMS_MONITOR_VIOLATE_INTR_MAP,
    pub core_1_pif_pms_monitor_violate_size_intr_map: CORE_1_PIF_PMS_MONITOR_VIOLATE_SIZE_INTR_MAP,
    pub backup_pms_violate_intr_map: BACKUP_PMS_VIOLATE_INTR_MAP,
    pub cache_core0_acs_int_map: CACHE_CORE0_ACS_INT_MAP,
    pub cache_core1_acs_int_map: CACHE_CORE1_ACS_INT_MAP,
    pub usb_device_int_map: USB_DEVICE_INT_MAP,
    pub peri_backup_int_map: PERI_BACKUP_INT_MAP,
    pub dma_extmem_reject_int_map: DMA_EXTMEM_REJECT_INT_MAP,
    pub pro_intr_status_0: PRO_INTR_STATUS_0,
    pub pro_intr_status_1: PRO_INTR_STATUS_1,
    pub pro_intr_status_2: PRO_INTR_STATUS_2,
    pub pro_intr_status_3: PRO_INTR_STATUS_3,
    pub clock_gate: CLOCK_GATE,
    pub date: DATE,
    /* private fields */
}

Expand description

Register block

Fields

pro_mac_intr_map: PRO_MAC_INTR_MAP

0x00 - mac interrupt configuration register

mac_nmi_map: MAC_NMI_MAP

0x04 - mac_nmi interrupt configuration register

pwr_intr_map: PWR_INTR_MAP

0x08 - pwr interrupt configuration register

bb_int_map: BB_INT_MAP

0x0c - bb interrupt configuration register

bt_mac_int_map: BT_MAC_INT_MAP

0x10 - bb_mac interrupt configuration register

bt_bb_int_map: BT_BB_INT_MAP

0x14 - bt_bb interrupt configuration register

bt_bb_nmi_map: BT_BB_NMI_MAP

0x18 - bt_bb_nmi interrupt configuration register

rwbt_irq_map: RWBT_IRQ_MAP

0x1c - rwbt_irq interrupt configuration register

rwble_irq_map: RWBLE_IRQ_MAP

0x20 - rwble_irq interrupt configuration register

rwbt_nmi_map: RWBT_NMI_MAP

0x24 - rwbt_nmi interrupt configuration register

rwble_nmi_map: RWBLE_NMI_MAP

0x28 - rwble_nmi interrupt configuration register

i2c_mst_int_map: I2C_MST_INT_MAP

0x2c - i2c_mst interrupt configuration register

slc0_intr_map: SLC0_INTR_MAP

0x30 - slc0 interrupt configuration register

slc1_intr_map: SLC1_INTR_MAP

0x34 - slc1 interrupt configuration register

uhci0_intr_map: UHCI0_INTR_MAP

0x38 - uhci0 interrupt configuration register

uhci1_intr_map: UHCI1_INTR_MAP

0x3c - uhci1 interrupt configuration register

gpio_interrupt_pro_map: GPIO_INTERRUPT_PRO_MAP

0x40 - gpio_interrupt_pro interrupt configuration register

gpio_interrupt_pro_nmi_map: GPIO_INTERRUPT_PRO_NMI_MAP

0x44 - gpio_interrupt_pro_nmi interrupt configuration register

gpio_interrupt_app_map: GPIO_INTERRUPT_APP_MAP

0x48 - gpio_interrupt_app interrupt configuration register

gpio_interrupt_app_nmi_map: GPIO_INTERRUPT_APP_NMI_MAP

0x4c - gpio_interrupt_app_nmi interrupt configuration register

spi_intr_1_map: SPI_INTR_1_MAP

0x50 - spi_intr_1 interrupt configuration register

spi_intr_2_map: SPI_INTR_2_MAP

0x54 - spi_intr_2 interrupt configuration register

spi_intr_3_map: SPI_INTR_3_MAP

0x58 - spi_intr_3 interrupt configuration register

spi_intr_4_map: SPI_INTR_4_MAP

0x5c - spi_intr_4 interrupt configuration register

lcd_cam_int_map: LCD_CAM_INT_MAP

0x60 - lcd_cam interrupt configuration register

i2s0_int_map: I2S0_INT_MAP

0x64 - i2s0 interrupt configuration register

i2s1_int_map: I2S1_INT_MAP

0x68 - i2s1 interrupt configuration register

uart_intr_map: UART_INTR_MAP

0x6c - uart interrupt configuration register

uart1_intr_map: UART1_INTR_MAP

0x70 - uart1 interrupt configuration register

uart2_intr_map: UART2_INTR_MAP

0x74 - uart2 interrupt configuration register

sdio_host_interrupt_map: SDIO_HOST_INTERRUPT_MAP

0x78 - sdio_host interrupt configuration register

pwm0_intr_map: PWM0_INTR_MAP

0x7c - pwm0 interrupt configuration register

pwm1_intr_map: PWM1_INTR_MAP

0x80 - pwm1 interrupt configuration register

pwm2_intr_map: PWM2_INTR_MAP

0x84 - pwm2 interrupt configuration register

pwm3_intr_map: PWM3_INTR_MAP

0x88 - pwm3 interrupt configuration register

ledc_int_map: LEDC_INT_MAP

0x8c - ledc interrupt configuration register

efuse_int_map: EFUSE_INT_MAP

0x90 - efuse interrupt configuration register

can_int_map: CAN_INT_MAP

0x94 - can interrupt configuration register

usb_intr_map: USB_INTR_MAP

0x98 - usb interrupt configuration register

rtc_core_intr_map: RTC_CORE_INTR_MAP

0x9c - rtc_core interrupt configuration register

rmt_intr_map: RMT_INTR_MAP

0xa0 - rmt interrupt configuration register

pcnt_intr_map: PCNT_INTR_MAP

0xa4 - pcnt interrupt configuration register

i2c_ext0_intr_map: I2C_EXT0_INTR_MAP

0xa8 - i2c_ext0 interrupt configuration register

i2c_ext1_intr_map: I2C_EXT1_INTR_MAP

0xac - i2c_ext1 interrupt configuration register

spi2_dma_int_map: SPI2_DMA_INT_MAP

0xb0 - spi2_dma interrupt configuration register

spi3_dma_int_map: SPI3_DMA_INT_MAP

0xb4 - spi3_dma interrupt configuration register

spi4_dma_int_map: SPI4_DMA_INT_MAP

0xb8 - spi4_dma interrupt configuration register

wdg_int_map: WDG_INT_MAP

0xbc - wdg interrupt configuration register

timer_int1_map: TIMER_INT1_MAP

0xc0 - timer_int1 interrupt configuration register

timer_int2_map: TIMER_INT2_MAP

0xc4 - timer_int2 interrupt configuration register

tg_t0_int_map: TG_T0_INT_MAP

0xc8 - tg_t0 interrupt configuration register

tg_t1_int_map: TG_T1_INT_MAP

0xcc - tg_t1 interrupt configuration register

tg_wdt_int_map: TG_WDT_INT_MAP

0xd0 - tg_wdt interrupt configuration register

tg1_t0_int_map: TG1_T0_INT_MAP

0xd4 - tg1_t0 interrupt configuration register

tg1_t1_int_map: TG1_T1_INT_MAP

0xd8 - tg1_t1 interrupt configuration register

tg1_wdt_int_map: TG1_WDT_INT_MAP

0xdc - tg1_wdt interrupt configuration register

cache_ia_int_map: CACHE_IA_INT_MAP

0xe0 - cache_ia interrupt configuration register

systimer_target0_int_map: SYSTIMER_TARGET0_INT_MAP

0xe4 - systimer_target0 interrupt configuration register

systimer_target1_int_map: SYSTIMER_TARGET1_INT_MAP

0xe8 - systimer_target1 interrupt configuration register

systimer_target2_int_map: SYSTIMER_TARGET2_INT_MAP

0xec - systimer_target2 interrupt configuration register

spi_mem_reject_intr_map: SPI_MEM_REJECT_INTR_MAP

0xf0 - spi_mem_reject interrupt configuration register

dcache_preload_int_map: DCACHE_PRELOAD_INT_MAP

0xf4 - dcache_prelaod interrupt configuration register

icache_preload_int_map: ICACHE_PRELOAD_INT_MAP

0xf8 - icache_preload interrupt configuration register

dcache_sync_int_map: DCACHE_SYNC_INT_MAP

0xfc - dcache_sync interrupt configuration register

icache_sync_int_map: ICACHE_SYNC_INT_MAP

0x100 - icache_sync interrupt configuration register

apb_adc_int_map: APB_ADC_INT_MAP

0x104 - apb_adc interrupt configuration register

dma_in_ch0_int_map: DMA_IN_CH0_INT_MAP

0x108 - dma_in_ch0 interrupt configuration register

dma_in_ch1_int_map: DMA_IN_CH1_INT_MAP

0x10c - dma_in_ch1 interrupt configuration register

dma_in_ch2_int_map: DMA_IN_CH2_INT_MAP

0x110 - dma_in_ch2 interrupt configuration register

dma_in_ch3_int_map: DMA_IN_CH3_INT_MAP

0x114 - dma_in_ch3 interrupt configuration register

dma_in_ch4_int_map: DMA_IN_CH4_INT_MAP

0x118 - dma_in_ch4 interrupt configuration register

dma_out_ch0_int_map: DMA_OUT_CH0_INT_MAP

0x11c - dma_out_ch0 interrupt configuration register

dma_out_ch1_int_map: DMA_OUT_CH1_INT_MAP

0x120 - dma_out_ch1 interrupt configuration register

dma_out_ch2_int_map: DMA_OUT_CH2_INT_MAP

0x124 - dma_out_ch2 interrupt configuration register

dma_out_ch3_int_map: DMA_OUT_CH3_INT_MAP

0x128 - dma_out_ch3 interrupt configuration register

dma_out_ch4_int_map: DMA_OUT_CH4_INT_MAP

0x12c - dma_out_ch4 interrupt configuration register

rsa_int_map: RSA_INT_MAP

0x130 - rsa interrupt configuration register

aes_int_map: AES_INT_MAP

0x134 - aes interrupt configuration register

sha_int_map: SHA_INT_MAP

0x138 - sha interrupt configuration register

cpu_intr_from_cpu_0_map: CPU_INTR_FROM_CPU_0_MAP

0x13c - cpu_intr_from_cpu_0 interrupt configuration register

cpu_intr_from_cpu_1_map: CPU_INTR_FROM_CPU_1_MAP

0x140 - cpu_intr_from_cpu_1 interrupt configuration register

cpu_intr_from_cpu_2_map: CPU_INTR_FROM_CPU_2_MAP

0x144 - cpu_intr_from_cpu_2 interrupt configuration register

cpu_intr_from_cpu_3_map: CPU_INTR_FROM_CPU_3_MAP

0x148 - cpu_intr_from_cpu_3 interrupt configuration register

assist_debug_intr_map: ASSIST_DEBUG_INTR_MAP

0x14c - assist_debug interrupt configuration register

dma_apbperi_pms_monitor_violate_intr_map: DMA_APBPERI_PMS_MONITOR_VIOLATE_INTR_MAP

0x150 - dma_pms_monitor_violatile interrupt configuration register

core_0_iram0_pms_monitor_violate_intr_map: CORE_0_IRAM0_PMS_MONITOR_VIOLATE_INTR_MAP

0x154 - core0_IRam0_pms_monitor_violatile interrupt configuration register

core_0_dram0_pms_monitor_violate_intr_map: CORE_0_DRAM0_PMS_MONITOR_VIOLATE_INTR_MAP

0x158 - core0_DRam0_pms_monitor_violatile interrupt configuration register

core_0_pif_pms_monitor_violate_intr_map: CORE_0_PIF_PMS_MONITOR_VIOLATE_INTR_MAP

0x15c - core0_PIF_pms_monitor_violatile interrupt configuration register

core_0_pif_pms_monitor_violate_size_intr_map: CORE_0_PIF_PMS_MONITOR_VIOLATE_SIZE_INTR_MAP

0x160 - core0_PIF_pms_monitor_violatile_size interrupt configuration register

core_1_iram0_pms_monitor_violate_intr_map: CORE_1_IRAM0_PMS_MONITOR_VIOLATE_INTR_MAP

0x164 - core1_IRam0_pms_monitor_violatile interrupt configuration register

core_1_dram0_pms_monitor_violate_intr_map: CORE_1_DRAM0_PMS_MONITOR_VIOLATE_INTR_MAP

0x168 - core1_DRam0_pms_monitor_violatile interrupt configuration register

core_1_pif_pms_monitor_violate_intr_map: CORE_1_PIF_PMS_MONITOR_VIOLATE_INTR_MAP

0x16c - core1_PIF_pms_monitor_violatile interrupt configuration register

core_1_pif_pms_monitor_violate_size_intr_map: CORE_1_PIF_PMS_MONITOR_VIOLATE_SIZE_INTR_MAP

0x170 - core1_PIF_pms_monitor_violatile_size interrupt configuration register

backup_pms_violate_intr_map: BACKUP_PMS_VIOLATE_INTR_MAP

0x174 - backup_pms_monitor_violatile interrupt configuration register

cache_core0_acs_int_map: CACHE_CORE0_ACS_INT_MAP

0x178 - cache_core0_acs interrupt configuration register

cache_core1_acs_int_map: CACHE_CORE1_ACS_INT_MAP

0x17c - cache_core1_acs interrupt configuration register

usb_device_int_map: USB_DEVICE_INT_MAP

0x180 - usb_device interrupt configuration register

peri_backup_int_map: PERI_BACKUP_INT_MAP

0x184 - peri_backup interrupt configuration register

dma_extmem_reject_int_map: DMA_EXTMEM_REJECT_INT_MAP

0x188 - dma_extmem_reject interrupt configuration register

pro_intr_status_0: PRO_INTR_STATUS_0

0x18c - interrupt status register

pro_intr_status_1: PRO_INTR_STATUS_1

0x190 - interrupt status register

pro_intr_status_2: PRO_INTR_STATUS_2

0x194 - interrupt status register

pro_intr_status_3: PRO_INTR_STATUS_3

0x198 - interrupt status register

clock_gate: CLOCK_GATE

0x19c - clock gate register

date: DATE

0x7fc - version register

Auto Trait Implementations

impl !RefUnwindSafe for RegisterBlock

impl Send for RegisterBlock

impl !Sync for RegisterBlock

impl Unpin for RegisterBlock

fn into(self) -> U

Calls U::from(self).

That is, this conversion is whatever the implementation of From<T> for U chooses to do.

source

impl<T, U> TryFrom for Twhere
U: Into<T>,

type Error = Infallible

The type returned in the event of a conversion error.

const: unstable · source

fn try_from(value: U) -> Result<T, <T as TryFrom>::Error>

Performs the conversion.

source

impl<T, U> TryInto for Twhere
U: TryFrom<T>,

type Error = >::Error

The type returned in the event of a conversion error.

const: unstable · source

fn try_into(self) -> Result<U, >::Error>

Performs the conversion.

Struct esp32s3::interrupt_core0::RegisterBlock

Fields

Auto Trait Implementations

impl !RefUnwindSafe for RegisterBlock

impl Send for RegisterBlock

impl !Sync for RegisterBlock

impl Unpin for RegisterBlock

impl UnwindSafe for RegisterBlock

Blanket Implementations

impl<T> Any for Twhere
T: 'static + ?Sized,

fn type_id(&self) -> TypeId

impl<T> Borrow<T> for Twhere
T: ?Sized,

fn borrow(&self) -> &T

impl<T> BorrowMut<T> for Twhere
T: ?Sized,

fn borrow_mut(&mut self) -> &mut T

impl<T> From<T> for T

fn from(t: T) -> T

impl<T, U> Into<U> for Twhere
U: From<T>,

fn into(self) -> U

impl<T, U> TryFrom<U> for Twhere
U: Into<T>,

type Error = Infallible

fn try_from(value: U) -> Result<T, <T as TryFrom<U>>::Error>

impl<T, U> TryInto<U> for Twhere
U: TryFrom<T>,

type Error = <U as TryFrom<T>>::Error

fn try_into(self) -> Result<U, <U as TryFrom<T>>::Error>

Struct esp32s3::interrupt_core0::RegisterBlock

Fields

Auto Trait Implementations

impl !RefUnwindSafe for RegisterBlock

impl Send for RegisterBlock

impl !Sync for RegisterBlock

impl Unpin for RegisterBlock

impl UnwindSafe for RegisterBlock

Blanket Implementations

impl<T> Any for Twhere T: 'static + ?Sized,

fn type_id(&self) -> TypeId

impl<T> Borrow<T> for Twhere T: ?Sized,

fn borrow(&self) -> &T

impl<T> BorrowMut<T> for Twhere T: ?Sized,

fn borrow_mut(&mut self) -> &mut T

impl<T> From<T> for T

fn from(t: T) -> T

impl<T, U> Into<U> for Twhere U: From<T>,

fn into(self) -> U

impl<T, U> TryFrom<U> for Twhere U: Into<T>,

type Error = Infallible

fn try_from(value: U) -> Result<T, <T as TryFrom<U>>::Error>

impl<T, U> TryInto<U> for Twhere U: TryFrom<T>,

type Error = <U as TryFrom<T>>::Error

fn try_into(self) -> Result<U, <U as TryFrom<T>>::Error>

impl<T> Any for Twhere
T: 'static + ?Sized,

impl<T> Borrow<T> for Twhere
T: ?Sized,

impl<T> BorrowMut<T> for Twhere
T: ?Sized,

impl<T, U> Into<U> for Twhere
U: From<T>,

impl<T, U> TryFrom<U> for Twhere
U: Into<T>,

impl<T, U> TryInto<U> for Twhere
U: TryFrom<T>,