esp32s3/sensitive/
cache_dataarray_connect_0.rs

1#[doc = "Register `CACHE_DATAARRAY_CONNECT_0` reader"]
2pub type R = crate::R<CACHE_DATAARRAY_CONNECT_0_SPEC>;
3#[doc = "Register `CACHE_DATAARRAY_CONNECT_0` writer"]
4pub type W = crate::W<CACHE_DATAARRAY_CONNECT_0_SPEC>;
5#[doc = "Field `CACHE_DATAARRAY_CONNECT_LOCK` reader - Set 1 to lock cache data array registers."]
6pub type CACHE_DATAARRAY_CONNECT_LOCK_R = crate::BitReader;
7#[doc = "Field `CACHE_DATAARRAY_CONNECT_LOCK` writer - Set 1 to lock cache data array registers."]
8pub type CACHE_DATAARRAY_CONNECT_LOCK_W<'a, REG> = crate::BitWriter<'a, REG>;
9impl R {
10    #[doc = "Bit 0 - Set 1 to lock cache data array registers."]
11    #[inline(always)]
12    pub fn cache_dataarray_connect_lock(&self) -> CACHE_DATAARRAY_CONNECT_LOCK_R {
13        CACHE_DATAARRAY_CONNECT_LOCK_R::new((self.bits & 1) != 0)
14    }
15}
16#[cfg(feature = "impl-register-debug")]
17impl core::fmt::Debug for R {
18    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
19        f.debug_struct("CACHE_DATAARRAY_CONNECT_0")
20            .field(
21                "cache_dataarray_connect_lock",
22                &self.cache_dataarray_connect_lock(),
23            )
24            .finish()
25    }
26}
27impl W {
28    #[doc = "Bit 0 - Set 1 to lock cache data array registers."]
29    #[inline(always)]
30    pub fn cache_dataarray_connect_lock(
31        &mut self,
32    ) -> CACHE_DATAARRAY_CONNECT_LOCK_W<CACHE_DATAARRAY_CONNECT_0_SPEC> {
33        CACHE_DATAARRAY_CONNECT_LOCK_W::new(self, 0)
34    }
35}
36#[doc = "Cache data array configuration register 0.\n\nYou can [`read`](crate::Reg::read) this register and get [`cache_dataarray_connect_0::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cache_dataarray_connect_0::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
37pub struct CACHE_DATAARRAY_CONNECT_0_SPEC;
38impl crate::RegisterSpec for CACHE_DATAARRAY_CONNECT_0_SPEC {
39    type Ux = u32;
40}
41#[doc = "`read()` method returns [`cache_dataarray_connect_0::R`](R) reader structure"]
42impl crate::Readable for CACHE_DATAARRAY_CONNECT_0_SPEC {}
43#[doc = "`write(|w| ..)` method takes [`cache_dataarray_connect_0::W`](W) writer structure"]
44impl crate::Writable for CACHE_DATAARRAY_CONNECT_0_SPEC {
45    type Safety = crate::Unsafe;
46    const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
47    const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
48}
49#[doc = "`reset()` method sets CACHE_DATAARRAY_CONNECT_0 to value 0"]
50impl crate::Resettable for CACHE_DATAARRAY_CONNECT_0_SPEC {
51    const RESET_VALUE: u32 = 0;
52}
esp32s3/sensitive/cache_dataarray_connect_0.rs

esp32s3/sensitive/
cache_dataarray_connect_0.rs
