esp32s3::spi0

Module sram_drd_cmd

Source
Expand description

SPI0 external RAM DDR read command control register

Structs§

Type Aliases§

  • CACHE_SRAM_USR_RD_CMD_BITLEN_R
    Field CACHE_SRAM_USR_RD_CMD_BITLEN reader - When SPI0 reads Ext_RAM, it is the length in bits of CMD phase. The register value shall be (bit_num-1).
  • CACHE_SRAM_USR_RD_CMD_BITLEN_W
    Field CACHE_SRAM_USR_RD_CMD_BITLEN writer - When SPI0 reads Ext_RAM, it is the length in bits of CMD phase. The register value shall be (bit_num-1).
  • CACHE_SRAM_USR_RD_CMD_VALUE_R
    Field CACHE_SRAM_USR_RD_CMD_VALUE reader - When SPI0 reads Ext_RAM, it is the command value of CMD phase.
  • CACHE_SRAM_USR_RD_CMD_VALUE_W
    Field CACHE_SRAM_USR_RD_CMD_VALUE writer - When SPI0 reads Ext_RAM, it is the command value of CMD phase.
  • R
    Register SRAM_DRD_CMD reader
  • W
    Register SRAM_DRD_CMD writer