esp32s2::rmt

Struct RegisterBlock

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#[repr(C)]
pub struct RegisterBlock { /* private fields */ }
Expand description

Register block

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impl RegisterBlock

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pub const fn chdata(&self, n: usize) -> &CHDATA

0x00..0x10 - The read and write data register for CHANNEL%s by apb fifo access.

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pub fn chdata_iter(&self) -> impl Iterator<Item = &CHDATA>

Iterator for array of: 0x00..0x10 - The read and write data register for CHANNEL%s by apb fifo access.

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pub const fn ch0data(&self) -> &CHDATA

0x00 - The read and write data register for CHANNEL0 by apb fifo access.

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pub const fn ch1data(&self) -> &CHDATA

0x04 - The read and write data register for CHANNEL1 by apb fifo access.

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pub const fn ch2data(&self) -> &CHDATA

0x08 - The read and write data register for CHANNEL2 by apb fifo access.

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pub const fn ch3data(&self) -> &CHDATA

0x0c - The read and write data register for CHANNEL3 by apb fifo access.

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pub const fn chconf0(&self, n: usize) -> &CHCONF0

0x10..0x20 - Channel %s configure register 0

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pub fn chconf0_iter(&self) -> impl Iterator<Item = &CHCONF0>

Iterator for array of: 0x10..0x20 - Channel %s configure register 0

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pub const fn ch0conf0(&self) -> &CHCONF0

0x10 - Channel 0 configure register 0

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pub const fn ch1conf0(&self) -> &CHCONF0

0x18 - Channel 1 configure register 0

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pub const fn ch2conf0(&self) -> &CHCONF0

0x20 - Channel 2 configure register 0

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pub const fn ch3conf0(&self) -> &CHCONF0

0x28 - Channel 3 configure register 0

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pub const fn chconf1(&self, n: usize) -> &CHCONF1

0x14..0x24 - Channel %s configure register 1

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pub fn chconf1_iter(&self) -> impl Iterator<Item = &CHCONF1>

Iterator for array of: 0x14..0x24 - Channel %s configure register 1

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pub const fn ch0conf1(&self) -> &CHCONF1

0x14 - Channel 0 configure register 1

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pub const fn ch1conf1(&self) -> &CHCONF1

0x1c - Channel 1 configure register 1

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pub const fn ch2conf1(&self) -> &CHCONF1

0x24 - Channel 2 configure register 1

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pub const fn ch3conf1(&self) -> &CHCONF1

0x2c - Channel 3 configure register 1

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pub const fn chstatus(&self, n: usize) -> &CHSTATUS

0x30..0x40 - Channel %s status register

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pub fn chstatus_iter(&self) -> impl Iterator<Item = &CHSTATUS>

Iterator for array of: 0x30..0x40 - Channel %s status register

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pub const fn ch0status(&self) -> &CHSTATUS

0x30 - Channel 0 status register

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pub const fn ch1status(&self) -> &CHSTATUS

0x34 - Channel 1 status register

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pub const fn ch2status(&self) -> &CHSTATUS

0x38 - Channel 2 status register

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pub const fn ch3status(&self) -> &CHSTATUS

0x3c - Channel 3 status register

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pub const fn chaddr(&self, n: usize) -> &CHADDR

0x40..0x50 - Channel %s address register

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pub fn chaddr_iter(&self) -> impl Iterator<Item = &CHADDR>

Iterator for array of: 0x40..0x50 - Channel %s address register

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pub const fn ch0addr(&self) -> &CHADDR

0x40 - Channel 0 address register

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pub const fn ch1addr(&self) -> &CHADDR

0x44 - Channel 1 address register

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pub const fn ch2addr(&self) -> &CHADDR

0x48 - Channel 2 address register

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pub const fn ch3addr(&self) -> &CHADDR

0x4c - Channel 3 address register

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pub const fn int_raw(&self) -> &INT_RAW

0x50 - Raw interrupt status

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pub const fn int_st(&self) -> &INT_ST

0x54 - Masked interrupt status

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pub const fn int_ena(&self) -> &INT_ENA

0x58 - Interrupt enable bits

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pub const fn int_clr(&self) -> &INT_CLR

0x5c - Interrupt clear bits

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pub const fn chcarrier_duty(&self, n: usize) -> &CHCARRIER_DUTY

0x60..0x70 - Channel %s duty cycle configuration register

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pub fn chcarrier_duty_iter(&self) -> impl Iterator<Item = &CHCARRIER_DUTY>

Iterator for array of: 0x60..0x70 - Channel %s duty cycle configuration register

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pub const fn ch0carrier_duty(&self) -> &CHCARRIER_DUTY

0x60 - Channel 0 duty cycle configuration register

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pub const fn ch1carrier_duty(&self) -> &CHCARRIER_DUTY

0x64 - Channel 1 duty cycle configuration register

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pub const fn ch2carrier_duty(&self) -> &CHCARRIER_DUTY

0x68 - Channel 2 duty cycle configuration register

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pub const fn ch3carrier_duty(&self) -> &CHCARRIER_DUTY

0x6c - Channel 3 duty cycle configuration register

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pub const fn ch_tx_lim(&self, n: usize) -> &CH_TX_LIM

0x70..0x80 - Channel %s Tx event configuration register

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pub fn ch_tx_lim_iter(&self) -> impl Iterator<Item = &CH_TX_LIM>

Iterator for array of: 0x70..0x80 - Channel %s Tx event configuration register

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pub const fn ch0_tx_lim(&self) -> &CH_TX_LIM

0x70 - Channel 0 Tx event configuration register

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pub const fn ch1_tx_lim(&self) -> &CH_TX_LIM

0x74 - Channel 1 Tx event configuration register

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pub const fn ch2_tx_lim(&self) -> &CH_TX_LIM

0x78 - Channel 2 Tx event configuration register

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pub const fn ch3_tx_lim(&self) -> &CH_TX_LIM

0x7c - Channel 3 Tx event configuration register

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pub const fn apb_conf(&self) -> &APB_CONF

0x80 - RMT apb configuration register

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pub const fn tx_sim(&self) -> &TX_SIM

0x84 - RMT TX synchronous register

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pub const fn ref_cnt_rst(&self) -> &REF_CNT_RST

0x88 - RMT clock divider reset register

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pub const fn ch_rx_carrier_rm(&self, n: usize) -> &CH_RX_CARRIER_RM

0x8c..0x9c - Channel %s carrier remove register

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pub fn ch_rx_carrier_rm_iter(&self) -> impl Iterator<Item = &CH_RX_CARRIER_RM>

Iterator for array of: 0x8c..0x9c - Channel %s carrier remove register

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pub const fn ch0_rx_carrier_rm(&self) -> &CH_RX_CARRIER_RM

0x8c - Channel 0 carrier remove register

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pub const fn ch1_rx_carrier_rm(&self) -> &CH_RX_CARRIER_RM

0x90 - Channel 1 carrier remove register

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pub const fn ch2_rx_carrier_rm(&self) -> &CH_RX_CARRIER_RM

0x94 - Channel 2 carrier remove register

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pub const fn ch3_rx_carrier_rm(&self) -> &CH_RX_CARRIER_RM

0x98 - Channel 3 carrier remove register

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pub const fn date(&self) -> &DATE

0xfc - RMT version register

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