Struct SPI3

pub struct SPI3 { /* private fields */ }

SPI (Serial Peripheral Interface) Controller 3

Implementations

impl SPI3

pub const PTR: *const RegisterBlock = {0x3f425000 as *const spi0::RegisterBlock}

Pointer to the register block

pub const fn ptr() -> *const RegisterBlock

Return the pointer to the register block

pub unsafe fn steal() -> Self

Steal an instance of this peripheral

Safety

Ensure that the new instance of the peripheral cannot be used in a way that may race with any existing instances, for example by only accessing read-only or write-only registers, or by consuming the original peripheral and using critical sections to coordinate access between multiple new instances.

Additionally, other software such as HALs may rely on only one peripheral instance existing to ensure memory safety; ensure no stolen instances are passed to such software.

Methods from Deref<Target = RegisterBlock>

pub fn cmd(&self) -> &CMD

0x00 - Command control register

pub fn addr(&self) -> &ADDR

0x04 - Address value

pub fn ctrl(&self) -> &CTRL

0x08 - SPI control register

pub fn ctrl1(&self) -> &CTRL1

0x0c - SPI control register 1

pub fn ctrl2(&self) -> &CTRL2

0x10 - SPI control register 2

pub fn clock(&self) -> &CLOCK

0x14 - SPI clock control register

pub fn user(&self) -> &USER

0x18 - SPI USER control register

pub fn user1(&self) -> &USER1

0x1c - SPI USER control register 1

pub fn user2(&self) -> &USER2

0x20 - SPI USER control register 2

pub fn mosi_dlen(&self) -> &MOSI_DLEN

0x24 - MOSI length

pub fn miso_dlen(&self) -> &MISO_DLEN

0x28 - MISO length

pub fn misc(&self) -> &MISC

0x2c - SPI misc register

pub fn slave(&self) -> &SLAVE

0x30 - SPI slave control register

pub fn slave1(&self) -> &SLAVE1

0x34 - SPI slave control register 1

pub fn slv_wrbuf_dlen(&self) -> &SLV_WRBUF_DLEN

0x38 - SPI slave Wr_BUF interrupt and CONF control register

pub fn slv_rdbuf_dlen(&self) -> &SLV_RDBUF_DLEN

0x3c - SPI magic error and slave control register

pub fn cache_sctrl(&self) -> &CACHE_SCTRL

0x40 - SPI Memory Cache SCTRL Register

pub fn slv_rd_byte(&self) -> &SLV_RD_BYTE

0x40 - SPI interrupt control register

pub fn fsm(&self) -> &FSM

0x44 - SPI master status and DMA read byte control register

pub fn sram_drd_cmd(&self) -> &SRAM_DRD_CMD

0x48 - SPI Memory SRAM DRD CMD Register

pub fn hold(&self) -> &HOLD

0x48 - SPI hold register

pub fn sram_dwr_cmd(&self) -> &SRAM_DWR_CMD

0x4c - SPI Memory SRAM DWR CMD Register

pub fn dma_conf(&self) -> &DMA_CONF

0x4c - SPI DMA control register

pub fn sram_clk(&self) -> &SRAM_CLK

0x50 - SPI Memory SRAM Clock Register

pub fn dma_out_link(&self) -> &DMA_OUT_LINK

0x50 - SPI DMA TX link configuration

pub fn dma_in_link(&self) -> &DMA_IN_LINK

0x54 - SPI DMA RX link configuration

pub fn dma_int_ena(&self) -> &DMA_INT_ENA

0x58 - SPI DMA interrupt enable register

pub fn dma_int_raw(&self) -> &DMA_INT_RAW

0x5c - SPI DMA interrupt raw register

pub fn dma_int_st(&self) -> &DMA_INT_ST

0x60 - SPI DMA interrupt status register

pub fn dma_int_clr(&self) -> &DMA_INT_CLR

0x64 - SPI DMA interrupt clear register

pub fn in_err_eof_des_addr(&self) -> &IN_ERR_EOF_DES_ADDR

0x68 - The latest SPI DMA RX descriptor address receiving error

pub fn in_suc_eof_des_addr(&self) -> &IN_SUC_EOF_DES_ADDR

0x6c - The latest SPI DMA eof RX descriptor address

pub fn inlink_dscr(&self) -> &INLINK_DSCR

0x70 - Current SPI DMA RX descriptor pointer

pub fn inlink_dscr_bf0(&self) -> &INLINK_DSCR_BF0

0x74 - Next SPI DMA RX descriptor pointer

pub fn inlink_dscr_bf1(&self) -> &INLINK_DSCR_BF1

0x78 - Current SPI DMA RX buffer pointer

pub fn out_eof_bfr_des_addr(&self) -> &OUT_EOF_BFR_DES_ADDR

0x7c - The latest SPI DMA eof TX buffer address

pub fn out_eof_des_addr(&self) -> &OUT_EOF_DES_ADDR

0x80 - The latest SPI DMA eof TX descriptor address

pub fn outlink_dscr(&self) -> &OUTLINK_DSCR

0x84 - Current SPI DMA TX descriptor pointer

pub fn outlink_dscr_bf0(&self) -> &OUTLINK_DSCR_BF0

0x88 - Next SPI DMA TX descriptor pointer

pub fn outlink_dscr_bf1(&self) -> &OUTLINK_DSCR_BF1

0x8c - Current SPI DMA TX buffer pointer

pub fn dma_outstatus(&self) -> &DMA_OUTSTATUS

0x90 - SPI DMA TX status

pub fn dma_instatus(&self) -> &DMA_INSTATUS

0x94 - SPI DMA RX status

pub fn w(&self, n: usize) -> &W

0x98..0xe0 - Data buffer %s

pub fn w_iter(&self) -> impl Iterator<Item = &W>

Iterator for array of: 0x98..0xe0 - Data buffer %s

pub fn clock_gate(&self) -> &CLOCK_GATE

0xdc - SPI Memory Clock Gate Register

pub fn din_mode(&self) -> &DIN_MODE

0xe0 - SPI input delay mode configuration

pub fn din_num(&self) -> &DIN_NUM

0xe4 - SPI input delay number configuration

pub fn dout_mode(&self) -> &DOUT_MODE

0xe8 - SPI output delay mode configuration

pub fn dout_num(&self) -> &DOUT_NUM

0xec - SPI output delay number configuration

pub fn lcd_ctrl(&self) -> &LCD_CTRL

0xf0 - LCD frame control register

pub fn lcd_ctrl1(&self) -> &LCD_CTRL1

0xf4 - LCD frame control1 register

pub fn lcd_ctrl2(&self) -> &LCD_CTRL2

0xf8 - LCD frame control2 register

pub fn lcd_d_mode(&self) -> &LCD_D_MODE

0xfc - LCD delay number

pub fn lcd_d_num(&self) -> &LCD_D_NUM

0x100 - LCD delay mode

pub fn reg_date(&self) -> &REG_DATE

0x3fc - SPI version control

Trait Implementations

impl Debug for SPI3

fn fmt(&self, f: &mut Formatter<'_>) -> Result

Formats the value using the given formatter.

impl Deref for SPI3

type Target = RegisterBlock

The resulting type after dereferencing.

fn deref(&self) -> &Self::Target

Dereferences the value.

impl Send for SPI3