esp32s2/system/
cpu_peri_clk_en.rs

1#[doc = "Register `CPU_PERI_CLK_EN` reader"]
2pub type R = crate::R<CPU_PERI_CLK_EN_SPEC>;
3#[doc = "Register `CPU_PERI_CLK_EN` writer"]
4pub type W = crate::W<CPU_PERI_CLK_EN_SPEC>;
5#[doc = "Field `CLK_EN_DEDICATED_GPIO` reader - Set this bit to enable clock of DEDICATED GPIO module."]
6pub type CLK_EN_DEDICATED_GPIO_R = crate::BitReader;
7#[doc = "Field `CLK_EN_DEDICATED_GPIO` writer - Set this bit to enable clock of DEDICATED GPIO module."]
8pub type CLK_EN_DEDICATED_GPIO_W<'a, REG> = crate::BitWriter<'a, REG>;
9impl R {
10    #[doc = "Bit 7 - Set this bit to enable clock of DEDICATED GPIO module."]
11    #[inline(always)]
12    pub fn clk_en_dedicated_gpio(&self) -> CLK_EN_DEDICATED_GPIO_R {
13        CLK_EN_DEDICATED_GPIO_R::new(((self.bits >> 7) & 1) != 0)
14    }
15}
16#[cfg(feature = "impl-register-debug")]
17impl core::fmt::Debug for R {
18    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
19        f.debug_struct("CPU_PERI_CLK_EN")
20            .field("clk_en_dedicated_gpio", &self.clk_en_dedicated_gpio())
21            .finish()
22    }
23}
24impl W {
25    #[doc = "Bit 7 - Set this bit to enable clock of DEDICATED GPIO module."]
26    #[inline(always)]
27    pub fn clk_en_dedicated_gpio(&mut self) -> CLK_EN_DEDICATED_GPIO_W<CPU_PERI_CLK_EN_SPEC> {
28        CLK_EN_DEDICATED_GPIO_W::new(self, 7)
29    }
30}
31#[doc = "CPU peripheral clock enable register\n\nYou can [`read`](crate::Reg::read) this register and get [`cpu_peri_clk_en::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cpu_peri_clk_en::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
32pub struct CPU_PERI_CLK_EN_SPEC;
33impl crate::RegisterSpec for CPU_PERI_CLK_EN_SPEC {
34    type Ux = u32;
35}
36#[doc = "`read()` method returns [`cpu_peri_clk_en::R`](R) reader structure"]
37impl crate::Readable for CPU_PERI_CLK_EN_SPEC {}
38#[doc = "`write(|w| ..)` method takes [`cpu_peri_clk_en::W`](W) writer structure"]
39impl crate::Writable for CPU_PERI_CLK_EN_SPEC {
40    type Safety = crate::Unsafe;
41    const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
42    const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
43}
44#[doc = "`reset()` method sets CPU_PERI_CLK_EN to value 0"]
45impl crate::Resettable for CPU_PERI_CLK_EN_SPEC {
46    const RESET_VALUE: u32 = 0;
47}
esp32s2/system/cpu_peri_clk_en.rs

esp32s2/system/
cpu_peri_clk_en.rs
