esp32s2/i2c_ana_mst/
config2.rs

1#[doc = "Register `CONFIG2` reader"]
2pub type R = crate::R<CONFIG2_SPEC>;
3#[doc = "Register `CONFIG2` writer"]
4pub type W = crate::W<CONFIG2_SPEC>;
5#[doc = "Field `SLAVE_ID` reader - I2C RTC Slave ID"]
6pub type SLAVE_ID_R = crate::FieldReader;
7#[doc = "Field `SLAVE_ID` writer - I2C RTC Slave ID"]
8pub type SLAVE_ID_W<'a, REG> = crate::FieldWriter<'a, REG, 8>;
9#[doc = "Field `ADDR` reader - I2C RTC Address"]
10pub type ADDR_R = crate::FieldReader;
11#[doc = "Field `ADDR` writer - I2C RTC Address"]
12pub type ADDR_W<'a, REG> = crate::FieldWriter<'a, REG, 8>;
13#[doc = "Field `DATA` reader - I2C RTC Data"]
14pub type DATA_R = crate::FieldReader;
15#[doc = "Field `DATA` writer - I2C RTC Data"]
16pub type DATA_W<'a, REG> = crate::FieldWriter<'a, REG, 8>;
17#[doc = "Field `SAR_MASK` reader - I2C RTC SAR Mask"]
18pub type SAR_MASK_R = crate::BitReader;
19#[doc = "Field `SAR_MASK` writer - I2C RTC SAR Mask"]
20pub type SAR_MASK_W<'a, REG> = crate::BitWriter<'a, REG>;
21#[doc = "Field `BOD_MASK` reader - I2C RTC BOD Mask"]
22pub type BOD_MASK_R = crate::BitReader;
23#[doc = "Field `BOD_MASK` writer - I2C RTC BOD Mask"]
24pub type BOD_MASK_W<'a, REG> = crate::BitWriter<'a, REG>;
25#[doc = "Field `WR_CNTL` reader - I2C RTC Write Control"]
26pub type WR_CNTL_R = crate::BitReader;
27#[doc = "Field `WR_CNTL` writer - I2C RTC Write Control"]
28pub type WR_CNTL_W<'a, REG> = crate::BitWriter<'a, REG>;
29#[doc = "Field `BUSY` reader - I2C RTC Busy"]
30pub type BUSY_R = crate::BitReader;
31impl R {
32    #[doc = "Bits 0:7 - I2C RTC Slave ID"]
33    #[inline(always)]
34    pub fn slave_id(&self) -> SLAVE_ID_R {
35        SLAVE_ID_R::new((self.bits & 0xff) as u8)
36    }
37    #[doc = "Bits 8:15 - I2C RTC Address"]
38    #[inline(always)]
39    pub fn addr(&self) -> ADDR_R {
40        ADDR_R::new(((self.bits >> 8) & 0xff) as u8)
41    }
42    #[doc = "Bits 16:23 - I2C RTC Data"]
43    #[inline(always)]
44    pub fn data(&self) -> DATA_R {
45        DATA_R::new(((self.bits >> 16) & 0xff) as u8)
46    }
47    #[doc = "Bit 18 - I2C RTC SAR Mask"]
48    #[inline(always)]
49    pub fn sar_mask(&self) -> SAR_MASK_R {
50        SAR_MASK_R::new(((self.bits >> 18) & 1) != 0)
51    }
52    #[doc = "Bit 22 - I2C RTC BOD Mask"]
53    #[inline(always)]
54    pub fn bod_mask(&self) -> BOD_MASK_R {
55        BOD_MASK_R::new(((self.bits >> 22) & 1) != 0)
56    }
57    #[doc = "Bit 24 - I2C RTC Write Control"]
58    #[inline(always)]
59    pub fn wr_cntl(&self) -> WR_CNTL_R {
60        WR_CNTL_R::new(((self.bits >> 24) & 1) != 0)
61    }
62    #[doc = "Bit 25 - I2C RTC Busy"]
63    #[inline(always)]
64    pub fn busy(&self) -> BUSY_R {
65        BUSY_R::new(((self.bits >> 25) & 1) != 0)
66    }
67}
68#[cfg(feature = "impl-register-debug")]
69impl core::fmt::Debug for R {
70    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
71        f.debug_struct("CONFIG2")
72            .field("slave_id", &self.slave_id())
73            .field("addr", &self.addr())
74            .field("data", &self.data())
75            .field("wr_cntl", &self.wr_cntl())
76            .field("busy", &self.busy())
77            .field("sar_mask", &self.sar_mask())
78            .field("bod_mask", &self.bod_mask())
79            .finish()
80    }
81}
82impl W {
83    #[doc = "Bits 0:7 - I2C RTC Slave ID"]
84    #[inline(always)]
85    pub fn slave_id(&mut self) -> SLAVE_ID_W<CONFIG2_SPEC> {
86        SLAVE_ID_W::new(self, 0)
87    }
88    #[doc = "Bits 8:15 - I2C RTC Address"]
89    #[inline(always)]
90    pub fn addr(&mut self) -> ADDR_W<CONFIG2_SPEC> {
91        ADDR_W::new(self, 8)
92    }
93    #[doc = "Bits 16:23 - I2C RTC Data"]
94    #[inline(always)]
95    pub fn data(&mut self) -> DATA_W<CONFIG2_SPEC> {
96        DATA_W::new(self, 16)
97    }
98    #[doc = "Bit 18 - I2C RTC SAR Mask"]
99    #[inline(always)]
100    pub fn sar_mask(&mut self) -> SAR_MASK_W<CONFIG2_SPEC> {
101        SAR_MASK_W::new(self, 18)
102    }
103    #[doc = "Bit 22 - I2C RTC BOD Mask"]
104    #[inline(always)]
105    pub fn bod_mask(&mut self) -> BOD_MASK_W<CONFIG2_SPEC> {
106        BOD_MASK_W::new(self, 22)
107    }
108    #[doc = "Bit 24 - I2C RTC Write Control"]
109    #[inline(always)]
110    pub fn wr_cntl(&mut self) -> WR_CNTL_W<CONFIG2_SPEC> {
111        WR_CNTL_W::new(self, 24)
112    }
113}
114#[doc = "I2C RTC Configuration register 2\n\nYou can [`read`](crate::Reg::read) this register and get [`config2::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`config2::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
115pub struct CONFIG2_SPEC;
116impl crate::RegisterSpec for CONFIG2_SPEC {
117    type Ux = u32;
118}
119#[doc = "`read()` method returns [`config2::R`](R) reader structure"]
120impl crate::Readable for CONFIG2_SPEC {}
121#[doc = "`write(|w| ..)` method takes [`config2::W`](W) writer structure"]
122impl crate::Writable for CONFIG2_SPEC {
123    type Safety = crate::Unsafe;
124    const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
125    const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
126}
127#[doc = "`reset()` method sets CONFIG2 to value 0"]
128impl crate::Resettable for CONFIG2_SPEC {
129    const RESET_VALUE: u32 = 0;
130}
esp32s2/i2c_ana_mst/config2.rs

esp32s2/i2c_ana_mst/
config2.rs
