esp32s2 0.31.1

Peripheral access crate for the ESP32-S2
Documentation 
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#[doc = "Register `SAR_IO_MUX_CONF` reader"]
pub type R = crate::R<SAR_IO_MUX_CONF_SPEC>;
#[doc = "Register `SAR_IO_MUX_CONF` writer"]
pub type W = crate::W<SAR_IO_MUX_CONF_SPEC>;
#[doc = "Field `IOMUX_RESET` reader - Reset IO MUX by software"]
pub type IOMUX_RESET_R = crate::BitReader;
#[doc = "Field `IOMUX_RESET` writer - Reset IO MUX by software"]
pub type IOMUX_RESET_W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `IOMUX_CLK_GATE_EN` reader - IO MUX clock gate enable bit"]
pub type IOMUX_CLK_GATE_EN_R = crate::BitReader;
#[doc = "Field `IOMUX_CLK_GATE_EN` writer - IO MUX clock gate enable bit"]
pub type IOMUX_CLK_GATE_EN_W<'a, REG> = crate::BitWriter<'a, REG>;
impl R {
    #[doc = "Bit 30 - Reset IO MUX by software"]
    #[inline(always)]
    pub fn iomux_reset(&self) -> IOMUX_RESET_R {
        IOMUX_RESET_R::new(((self.bits >> 30) & 1) != 0)
    }
    #[doc = "Bit 31 - IO MUX clock gate enable bit"]
    #[inline(always)]
    pub fn iomux_clk_gate_en(&self) -> IOMUX_CLK_GATE_EN_R {
        IOMUX_CLK_GATE_EN_R::new(((self.bits >> 31) & 1) != 0)
    }
}
#[cfg(feature = "impl-register-debug")]
impl core::fmt::Debug for R {
    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
        f.debug_struct("SAR_IO_MUX_CONF")
            .field("iomux_reset", &self.iomux_reset())
            .field("iomux_clk_gate_en", &self.iomux_clk_gate_en())
            .finish()
    }
}
impl W {
    #[doc = "Bit 30 - Reset IO MUX by software"]
    #[inline(always)]
    pub fn iomux_reset(&mut self) -> IOMUX_RESET_W<'_, SAR_IO_MUX_CONF_SPEC> {
        IOMUX_RESET_W::new(self, 30)
    }
    #[doc = "Bit 31 - IO MUX clock gate enable bit"]
    #[inline(always)]
    pub fn iomux_clk_gate_en(&mut self) -> IOMUX_CLK_GATE_EN_W<'_, SAR_IO_MUX_CONF_SPEC> {
        IOMUX_CLK_GATE_EN_W::new(self, 31)
    }
}
#[doc = "Configure and reset IO MUX\n\nYou can [`read`](crate::Reg::read) this register and get [`sar_io_mux_conf::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`sar_io_mux_conf::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
pub struct SAR_IO_MUX_CONF_SPEC;
impl crate::RegisterSpec for SAR_IO_MUX_CONF_SPEC {
    type Ux = u32;
}
#[doc = "`read()` method returns [`sar_io_mux_conf::R`](R) reader structure"]
impl crate::Readable for SAR_IO_MUX_CONF_SPEC {}
#[doc = "`write(|w| ..)` method takes [`sar_io_mux_conf::W`](W) writer structure"]
impl crate::Writable for SAR_IO_MUX_CONF_SPEC {
    type Safety = crate::Unsafe;
}
#[doc = "`reset()` method sets SAR_IO_MUX_CONF to value 0"]
impl crate::Resettable for SAR_IO_MUX_CONF_SPEC {}