Expand description
Masked interrupt status
Structs
- Masked interrupt status
- Register
INT_ST
reader
Type Definitions
- Field
AT_CMD_CHAR_DET_INT_ST
reader - This is the status bit for UART_AT_CMD_CHAR_DET_INT when UART_AT_CMD_CHAR_DET_INT_ENA is set to 1. - Field
BRK_DET_INT_ST
reader - This is the status bit for UART_BRK_DET_INT when UART_BRK_DET_INT_ENA is set to 1. - Field
CTS_CHG_INT_ST
reader - This is the status bit for UART_CTS_CHG_INT when UART_CTS_CHG_INT_ENA is set to 1. - Field
DSR_CHG_INT_ST
reader - This is the status bit for UART_DSR_CHG_INT when UART_DSR_CHG_INT_ENA is set to 1. - Field
FRM_ERR_INT_ST
reader - This is the status bit for UART_FRM_ERR_INT when UART_FRM_ERR_INT_ENA is set to 1. - Field
GLITCH_DET_INT_ST
reader - This is the status bit for UART_GLITCH_DET_INT when UART_GLITCH_DET_INT_ENA is set to 1. - Field
PARITY_ERR_INT_ST
reader - This is the status bit for UART_PARITY_ERR_INT when UART_PARITY_ERR_INT_ENA is set to 1. - Field
RS485_CLASH_INT_ST
reader - This is the status bit for UART_RS485_CLASH_INT when UART_RS485_CLASH_INT_ENA is set to 1. - Field
RS485_FRM_ERR_INT_ST
reader - This is the status bit for UART_RS485_FRM_ERR_INT when UART_RS485_FRM_ERR_INT_ENA is set to 1. - Field
RS485_PARITY_ERR_INT_ST
reader - This is the status bit for UART_RS485_PARITY_ERR_INT when UART_RS485_PARITY_INT_ENA is set to 1. - Field
RXFIFO_FULL_INT_ST
reader - This is the status bit for UART_RXFIFO_FULL_INT when UART_RXFIFO_FULL_INT_ENA is set to 1. - Field
RXFIFO_OVF_INT_ST
reader - This is the status bit for UART_RXFIFO_OVF_INT when UART_RXFIFO_OVF_INT_ENA is set to 1. - Field
RXFIFO_TOUT_INT_ST
reader - This is the status bit for UART_RXFIFO_TOUT_INT when UART_RXFIFO_TOUT_INT_ENA is set to 1. - Field
SW_XOFF_INT_ST
reader - This is the status bit for UART_SW_XOFF_INT when UART_SW_XOFF_INT_ENA is set to 1. - Field
SW_XON_INT_ST
reader - This is the status bit for UART_SW_XON_INT when UART_SW_XON_INT_ENA is set to 1. - Field
TXFIFO_EMPTY_INT_ST
reader - This is the status bit for UART_TXFIFO_EMPTY_INT when UART_TXFIFO_EMPTY_INT_ENA is set to 1. - Field
TX_BRK_DONE_INT_ST
reader - This is the status bit for UART_TX_BRK_DONE_INT when UART_TX_BRK_DONE_INT_ENA is set to 1. - Field
TX_BRK_IDLE_DONE_INT_ST
reader - This is the status bit for UART_TX_BRK_IDLE_DONE_INT when UART_TX_BRK_IDLE_DONE_INT_ENA is set to 1. - Field
TX_DONE_INT_ST
reader - This is the status bit for UART_TX_DONE_INT when UART_TX_DONE_INT_ENA is set to 1. - Field
WAKEUP_INT_ST
reader - This is the status bit for UART_WAKEUP_INT when UART_WAKEUP_INT_ENA is set to 1.