esp32p4/cache/
sync_addr.rs

1#[doc = "Register `SYNC_ADDR` reader"]
2pub type R = crate::R<SYNC_ADDR_SPEC>;
3#[doc = "Register `SYNC_ADDR` writer"]
4pub type W = crate::W<SYNC_ADDR_SPEC>;
5#[doc = "Field `SYNC_ADDR` reader - Those bits are used to configure the start virtual address of the sync operation, which should be used together with CACHE_SYNC_SIZE_REG"]
6pub type SYNC_ADDR_R = crate::FieldReader<u32>;
7#[doc = "Field `SYNC_ADDR` writer - Those bits are used to configure the start virtual address of the sync operation, which should be used together with CACHE_SYNC_SIZE_REG"]
8pub type SYNC_ADDR_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>;
9impl R {
10    #[doc = "Bits 0:31 - Those bits are used to configure the start virtual address of the sync operation, which should be used together with CACHE_SYNC_SIZE_REG"]
11    #[inline(always)]
12    pub fn sync_addr(&self) -> SYNC_ADDR_R {
13        SYNC_ADDR_R::new(self.bits)
14    }
15}
16#[cfg(feature = "impl-register-debug")]
17impl core::fmt::Debug for R {
18    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
19        f.debug_struct("SYNC_ADDR")
20            .field("sync_addr", &format_args!("{}", self.sync_addr().bits()))
21            .finish()
22    }
23}
24#[cfg(feature = "impl-register-debug")]
25impl core::fmt::Debug for crate::generic::Reg<SYNC_ADDR_SPEC> {
26    fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result {
27        core::fmt::Debug::fmt(&self.read(), f)
28    }
29}
30impl W {
31    #[doc = "Bits 0:31 - Those bits are used to configure the start virtual address of the sync operation, which should be used together with CACHE_SYNC_SIZE_REG"]
32    #[inline(always)]
33    #[must_use]
34    pub fn sync_addr(&mut self) -> SYNC_ADDR_W<SYNC_ADDR_SPEC> {
35        SYNC_ADDR_W::new(self, 0)
36    }
37}
38#[doc = "Sync address configure register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`sync_addr::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`sync_addr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
39pub struct SYNC_ADDR_SPEC;
40impl crate::RegisterSpec for SYNC_ADDR_SPEC {
41    type Ux = u32;
42}
43#[doc = "`read()` method returns [`sync_addr::R`](R) reader structure"]
44impl crate::Readable for SYNC_ADDR_SPEC {}
45#[doc = "`write(|w| ..)` method takes [`sync_addr::W`](W) writer structure"]
46impl crate::Writable for SYNC_ADDR_SPEC {
47    type Safety = crate::Unsafe;
48    const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
49    const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
50}
51#[doc = "`reset()` method sets SYNC_ADDR to value 0"]
52impl crate::Resettable for SYNC_ADDR_SPEC {
53    const RESET_VALUE: u32 = 0;
54}
esp32p4/cache/sync_addr.rs

esp32p4/cache/
sync_addr.rs
