1#[repr(C)]
2#[cfg_attr(feature = "impl-register-debug", derive(Debug))]
3#[doc = "Register block"]
4pub struct RegisterBlock {
5 regdma_conf: REGDMA_CONF,
6 regdma_clk_conf: REGDMA_CLK_CONF,
7 regdma_etm_ctrl: REGDMA_ETM_CTRL,
8 regdma_link_0_addr: REGDMA_LINK_0_ADDR,
9 regdma_link_1_addr: REGDMA_LINK_1_ADDR,
10 regdma_link_2_addr: REGDMA_LINK_2_ADDR,
11 regdma_link_3_addr: REGDMA_LINK_3_ADDR,
12 regdma_link_mac_addr: REGDMA_LINK_MAC_ADDR,
13 regdma_current_link_addr: REGDMA_CURRENT_LINK_ADDR,
14 regdma_backup_addr: REGDMA_BACKUP_ADDR,
15 regdma_mem_addr: REGDMA_MEM_ADDR,
16 regdma_bkp_conf: REGDMA_BKP_CONF,
17 int_ena: INT_ENA,
18 int_raw: INT_RAW,
19 int_clr: INT_CLR,
20 int_st: INT_ST,
21 _reserved16: [u8; 0x03bc],
22 date: DATE,
23}
24impl RegisterBlock {
25 #[doc = "0x00 - Peri backup control register"]
26 #[inline(always)]
27 pub const fn regdma_conf(&self) -> ®DMA_CONF {
28 &self.regdma_conf
29 }
30 #[doc = "0x04 - Clock control register"]
31 #[inline(always)]
32 pub const fn regdma_clk_conf(&self) -> ®DMA_CLK_CONF {
33 &self.regdma_clk_conf
34 }
35 #[doc = "0x08 - ETM start ctrl reg"]
36 #[inline(always)]
37 pub const fn regdma_etm_ctrl(&self) -> ®DMA_ETM_CTRL {
38 &self.regdma_etm_ctrl
39 }
40 #[doc = "0x0c - link_0_addr"]
41 #[inline(always)]
42 pub const fn regdma_link_0_addr(&self) -> ®DMA_LINK_0_ADDR {
43 &self.regdma_link_0_addr
44 }
45 #[doc = "0x10 - Link_1_addr"]
46 #[inline(always)]
47 pub const fn regdma_link_1_addr(&self) -> ®DMA_LINK_1_ADDR {
48 &self.regdma_link_1_addr
49 }
50 #[doc = "0x14 - Link_2_addr"]
51 #[inline(always)]
52 pub const fn regdma_link_2_addr(&self) -> ®DMA_LINK_2_ADDR {
53 &self.regdma_link_2_addr
54 }
55 #[doc = "0x18 - Link_3_addr"]
56 #[inline(always)]
57 pub const fn regdma_link_3_addr(&self) -> ®DMA_LINK_3_ADDR {
58 &self.regdma_link_3_addr
59 }
60 #[doc = "0x1c - Link_mac_addr"]
61 #[inline(always)]
62 pub const fn regdma_link_mac_addr(&self) -> ®DMA_LINK_MAC_ADDR {
63 &self.regdma_link_mac_addr
64 }
65 #[doc = "0x20 - current link addr"]
66 #[inline(always)]
67 pub const fn regdma_current_link_addr(&self) -> ®DMA_CURRENT_LINK_ADDR {
68 &self.regdma_current_link_addr
69 }
70 #[doc = "0x24 - Backup addr"]
71 #[inline(always)]
72 pub const fn regdma_backup_addr(&self) -> ®DMA_BACKUP_ADDR {
73 &self.regdma_backup_addr
74 }
75 #[doc = "0x28 - mem addr"]
76 #[inline(always)]
77 pub const fn regdma_mem_addr(&self) -> ®DMA_MEM_ADDR {
78 &self.regdma_mem_addr
79 }
80 #[doc = "0x2c - backup config"]
81 #[inline(always)]
82 pub const fn regdma_bkp_conf(&self) -> ®DMA_BKP_CONF {
83 &self.regdma_bkp_conf
84 }
85 #[doc = "0x30 - Read only register for error and done"]
86 #[inline(always)]
87 pub const fn int_ena(&self) -> &INT_ENA {
88 &self.int_ena
89 }
90 #[doc = "0x34 - Read only register for error and done"]
91 #[inline(always)]
92 pub const fn int_raw(&self) -> &INT_RAW {
93 &self.int_raw
94 }
95 #[doc = "0x38 - Read only register for error and done"]
96 #[inline(always)]
97 pub const fn int_clr(&self) -> &INT_CLR {
98 &self.int_clr
99 }
100 #[doc = "0x3c - Read only register for error and done"]
101 #[inline(always)]
102 pub const fn int_st(&self) -> &INT_ST {
103 &self.int_st
104 }
105 #[doc = "0x3fc - Date register."]
106 #[inline(always)]
107 pub const fn date(&self) -> &DATE {
108 &self.date
109 }
110}
111#[doc = "REGDMA_CONF (rw) register accessor: Peri backup control register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`regdma_conf::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`regdma_conf::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@regdma_conf`] module"]
112pub type REGDMA_CONF = crate::Reg<regdma_conf::REGDMA_CONF_SPEC>;
113#[doc = "Peri backup control register"]
114pub mod regdma_conf;
115#[doc = "REGDMA_CLK_CONF (rw) register accessor: Clock control register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`regdma_clk_conf::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`regdma_clk_conf::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@regdma_clk_conf`] module"]
116pub type REGDMA_CLK_CONF = crate::Reg<regdma_clk_conf::REGDMA_CLK_CONF_SPEC>;
117#[doc = "Clock control register"]
118pub mod regdma_clk_conf;
119#[doc = "REGDMA_ETM_CTRL (w) register accessor: ETM start ctrl reg\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`regdma_etm_ctrl::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@regdma_etm_ctrl`] module"]
120pub type REGDMA_ETM_CTRL = crate::Reg<regdma_etm_ctrl::REGDMA_ETM_CTRL_SPEC>;
121#[doc = "ETM start ctrl reg"]
122pub mod regdma_etm_ctrl;
123#[doc = "REGDMA_LINK_0_ADDR (rw) register accessor: link_0_addr\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`regdma_link_0_addr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`regdma_link_0_addr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@regdma_link_0_addr`] module"]
124pub type REGDMA_LINK_0_ADDR = crate::Reg<regdma_link_0_addr::REGDMA_LINK_0_ADDR_SPEC>;
125#[doc = "link_0_addr"]
126pub mod regdma_link_0_addr;
127#[doc = "REGDMA_LINK_1_ADDR (rw) register accessor: Link_1_addr\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`regdma_link_1_addr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`regdma_link_1_addr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@regdma_link_1_addr`] module"]
128pub type REGDMA_LINK_1_ADDR = crate::Reg<regdma_link_1_addr::REGDMA_LINK_1_ADDR_SPEC>;
129#[doc = "Link_1_addr"]
130pub mod regdma_link_1_addr;
131#[doc = "REGDMA_LINK_2_ADDR (rw) register accessor: Link_2_addr\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`regdma_link_2_addr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`regdma_link_2_addr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@regdma_link_2_addr`] module"]
132pub type REGDMA_LINK_2_ADDR = crate::Reg<regdma_link_2_addr::REGDMA_LINK_2_ADDR_SPEC>;
133#[doc = "Link_2_addr"]
134pub mod regdma_link_2_addr;
135#[doc = "REGDMA_LINK_3_ADDR (rw) register accessor: Link_3_addr\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`regdma_link_3_addr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`regdma_link_3_addr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@regdma_link_3_addr`] module"]
136pub type REGDMA_LINK_3_ADDR = crate::Reg<regdma_link_3_addr::REGDMA_LINK_3_ADDR_SPEC>;
137#[doc = "Link_3_addr"]
138pub mod regdma_link_3_addr;
139#[doc = "REGDMA_LINK_MAC_ADDR (rw) register accessor: Link_mac_addr\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`regdma_link_mac_addr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`regdma_link_mac_addr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@regdma_link_mac_addr`] module"]
140pub type REGDMA_LINK_MAC_ADDR = crate::Reg<regdma_link_mac_addr::REGDMA_LINK_MAC_ADDR_SPEC>;
141#[doc = "Link_mac_addr"]
142pub mod regdma_link_mac_addr;
143#[doc = "REGDMA_CURRENT_LINK_ADDR (r) register accessor: current link addr\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`regdma_current_link_addr::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@regdma_current_link_addr`] module"]
144pub type REGDMA_CURRENT_LINK_ADDR =
145 crate::Reg<regdma_current_link_addr::REGDMA_CURRENT_LINK_ADDR_SPEC>;
146#[doc = "current link addr"]
147pub mod regdma_current_link_addr;
148#[doc = "REGDMA_BACKUP_ADDR (r) register accessor: Backup addr\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`regdma_backup_addr::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@regdma_backup_addr`] module"]
149pub type REGDMA_BACKUP_ADDR = crate::Reg<regdma_backup_addr::REGDMA_BACKUP_ADDR_SPEC>;
150#[doc = "Backup addr"]
151pub mod regdma_backup_addr;
152#[doc = "REGDMA_MEM_ADDR (r) register accessor: mem addr\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`regdma_mem_addr::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@regdma_mem_addr`] module"]
153pub type REGDMA_MEM_ADDR = crate::Reg<regdma_mem_addr::REGDMA_MEM_ADDR_SPEC>;
154#[doc = "mem addr"]
155pub mod regdma_mem_addr;
156#[doc = "REGDMA_BKP_CONF (rw) register accessor: backup config\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`regdma_bkp_conf::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`regdma_bkp_conf::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@regdma_bkp_conf`] module"]
157pub type REGDMA_BKP_CONF = crate::Reg<regdma_bkp_conf::REGDMA_BKP_CONF_SPEC>;
158#[doc = "backup config"]
159pub mod regdma_bkp_conf;
160#[doc = "INT_ENA (rw) register accessor: Read only register for error and done\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`int_ena::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`int_ena::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@int_ena`] module"]
161pub type INT_ENA = crate::Reg<int_ena::INT_ENA_SPEC>;
162#[doc = "Read only register for error and done"]
163pub mod int_ena;
164#[doc = "INT_RAW (rw) register accessor: Read only register for error and done\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`int_raw::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`int_raw::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@int_raw`] module"]
165pub type INT_RAW = crate::Reg<int_raw::INT_RAW_SPEC>;
166#[doc = "Read only register for error and done"]
167pub mod int_raw;
168#[doc = "INT_CLR (w) register accessor: Read only register for error and done\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`int_clr::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@int_clr`] module"]
169pub type INT_CLR = crate::Reg<int_clr::INT_CLR_SPEC>;
170#[doc = "Read only register for error and done"]
171pub mod int_clr;
172#[doc = "INT_ST (r) register accessor: Read only register for error and done\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`int_st::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@int_st`] module"]
173pub type INT_ST = crate::Reg<int_st::INT_ST_SPEC>;
174#[doc = "Read only register for error and done"]
175pub mod int_st;
176#[doc = "DATE (rw) register accessor: Date register.\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`date::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`date::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@date`] module"]
177pub type DATE = crate::Reg<date::DATE_SPEC>;
178#[doc = "Date register."]
179pub mod date;