esp32p4/i3c_mst/
scl_i3c_mst_pp_time.rs

1#[doc = "Register `SCL_I3C_MST_PP_TIME` reader"]
2pub type R = crate::R<SCL_I3C_MST_PP_TIME_SPEC>;
3#[doc = "Register `SCL_I3C_MST_PP_TIME` writer"]
4pub type W = crate::W<SCL_I3C_MST_PP_TIME_SPEC>;
5#[doc = "Field `REG_I3C_MST_PP_LOW_PERIOD` reader - NA"]
6pub type REG_I3C_MST_PP_LOW_PERIOD_R = crate::FieldReader;
7#[doc = "Field `REG_I3C_MST_PP_LOW_PERIOD` writer - NA"]
8pub type REG_I3C_MST_PP_LOW_PERIOD_W<'a, REG> = crate::FieldWriter<'a, REG, 8>;
9#[doc = "Field `REG_I3C_MST_PP_HIGH_PERIOD` reader - NA"]
10pub type REG_I3C_MST_PP_HIGH_PERIOD_R = crate::FieldReader;
11#[doc = "Field `REG_I3C_MST_PP_HIGH_PERIOD` writer - NA"]
12pub type REG_I3C_MST_PP_HIGH_PERIOD_W<'a, REG> = crate::FieldWriter<'a, REG, 8>;
13impl R {
14    #[doc = "Bits 0:7 - NA"]
15    #[inline(always)]
16    pub fn reg_i3c_mst_pp_low_period(&self) -> REG_I3C_MST_PP_LOW_PERIOD_R {
17        REG_I3C_MST_PP_LOW_PERIOD_R::new((self.bits & 0xff) as u8)
18    }
19    #[doc = "Bits 16:23 - NA"]
20    #[inline(always)]
21    pub fn reg_i3c_mst_pp_high_period(&self) -> REG_I3C_MST_PP_HIGH_PERIOD_R {
22        REG_I3C_MST_PP_HIGH_PERIOD_R::new(((self.bits >> 16) & 0xff) as u8)
23    }
24}
25#[cfg(feature = "impl-register-debug")]
26impl core::fmt::Debug for R {
27    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
28        f.debug_struct("SCL_I3C_MST_PP_TIME")
29            .field(
30                "reg_i3c_mst_pp_low_period",
31                &format_args!("{}", self.reg_i3c_mst_pp_low_period().bits()),
32            )
33            .field(
34                "reg_i3c_mst_pp_high_period",
35                &format_args!("{}", self.reg_i3c_mst_pp_high_period().bits()),
36            )
37            .finish()
38    }
39}
40#[cfg(feature = "impl-register-debug")]
41impl core::fmt::Debug for crate::generic::Reg<SCL_I3C_MST_PP_TIME_SPEC> {
42    fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result {
43        core::fmt::Debug::fmt(&self.read(), f)
44    }
45}
46impl W {
47    #[doc = "Bits 0:7 - NA"]
48    #[inline(always)]
49    #[must_use]
50    pub fn reg_i3c_mst_pp_low_period(
51        &mut self,
52    ) -> REG_I3C_MST_PP_LOW_PERIOD_W<SCL_I3C_MST_PP_TIME_SPEC> {
53        REG_I3C_MST_PP_LOW_PERIOD_W::new(self, 0)
54    }
55    #[doc = "Bits 16:23 - NA"]
56    #[inline(always)]
57    #[must_use]
58    pub fn reg_i3c_mst_pp_high_period(
59        &mut self,
60    ) -> REG_I3C_MST_PP_HIGH_PERIOD_W<SCL_I3C_MST_PP_TIME_SPEC> {
61        REG_I3C_MST_PP_HIGH_PERIOD_W::new(self, 16)
62    }
63}
64#[doc = "NA\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`scl_i3c_mst_pp_time::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`scl_i3c_mst_pp_time::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
65pub struct SCL_I3C_MST_PP_TIME_SPEC;
66impl crate::RegisterSpec for SCL_I3C_MST_PP_TIME_SPEC {
67    type Ux = u32;
68}
69#[doc = "`read()` method returns [`scl_i3c_mst_pp_time::R`](R) reader structure"]
70impl crate::Readable for SCL_I3C_MST_PP_TIME_SPEC {}
71#[doc = "`write(|w| ..)` method takes [`scl_i3c_mst_pp_time::W`](W) writer structure"]
72impl crate::Writable for SCL_I3C_MST_PP_TIME_SPEC {
73    type Safety = crate::Unsafe;
74    const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
75    const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
76}
77#[doc = "`reset()` method sets SCL_I3C_MST_PP_TIME to value 0x0005_0005"]
78impl crate::Resettable for SCL_I3C_MST_PP_TIME_SPEC {
79    const RESET_VALUE: u32 = 0x0005_0005;
80}
esp32p4/i3c_mst/scl_i3c_mst_pp_time.rs

esp32p4/i3c_mst/
scl_i3c_mst_pp_time.rs
