esp32p4/pmu/
int_ena.rs

1#[doc = "Register `INT_ENA` reader"]
2pub type R = crate::R<INT_ENA_SPEC>;
3#[doc = "Register `INT_ENA` writer"]
4pub type W = crate::W<INT_ENA_SPEC>;
5#[doc = "Field `_0P1A_CNT_TARGET0_REACH_0_HP` reader - reg_0p1a_0_counter after xpd reach target0"]
6pub type _0P1A_CNT_TARGET0_REACH_0_HP_R = crate::BitReader;
7#[doc = "Field `_0P1A_CNT_TARGET0_REACH_0_HP` writer - reg_0p1a_0_counter after xpd reach target0"]
8pub type _0P1A_CNT_TARGET0_REACH_0_HP_W<'a, REG> = crate::BitWriter<'a, REG>;
9#[doc = "Field `_0P1A_CNT_TARGET1_REACH_0_HP` reader - reg_0p1a_1_counter after xpd reach target1"]
10pub type _0P1A_CNT_TARGET1_REACH_0_HP_R = crate::BitReader;
11#[doc = "Field `_0P1A_CNT_TARGET1_REACH_0_HP` writer - reg_0p1a_1_counter after xpd reach target1"]
12pub type _0P1A_CNT_TARGET1_REACH_0_HP_W<'a, REG> = crate::BitWriter<'a, REG>;
13#[doc = "Field `_0P1A_CNT_TARGET0_REACH_1_HP` reader - reg_0p1a_0 counter after xpd reach target0"]
14pub type _0P1A_CNT_TARGET0_REACH_1_HP_R = crate::BitReader;
15#[doc = "Field `_0P1A_CNT_TARGET0_REACH_1_HP` writer - reg_0p1a_0 counter after xpd reach target0"]
16pub type _0P1A_CNT_TARGET0_REACH_1_HP_W<'a, REG> = crate::BitWriter<'a, REG>;
17#[doc = "Field `_0P1A_CNT_TARGET1_REACH_1_HP` reader - reg_0p1a_1_counter after xpd reach target1"]
18pub type _0P1A_CNT_TARGET1_REACH_1_HP_R = crate::BitReader;
19#[doc = "Field `_0P1A_CNT_TARGET1_REACH_1_HP` writer - reg_0p1a_1_counter after xpd reach target1"]
20pub type _0P1A_CNT_TARGET1_REACH_1_HP_W<'a, REG> = crate::BitWriter<'a, REG>;
21#[doc = "Field `_0P2A_CNT_TARGET0_REACH_0_HP` reader - reg_0p2a_0 counter after xpd reach target0"]
22pub type _0P2A_CNT_TARGET0_REACH_0_HP_R = crate::BitReader;
23#[doc = "Field `_0P2A_CNT_TARGET0_REACH_0_HP` writer - reg_0p2a_0 counter after xpd reach target0"]
24pub type _0P2A_CNT_TARGET0_REACH_0_HP_W<'a, REG> = crate::BitWriter<'a, REG>;
25#[doc = "Field `_0P2A_CNT_TARGET1_REACH_0_HP` reader - reg_0p2a_1_counter after xpd reach target1"]
26pub type _0P2A_CNT_TARGET1_REACH_0_HP_R = crate::BitReader;
27#[doc = "Field `_0P2A_CNT_TARGET1_REACH_0_HP` writer - reg_0p2a_1_counter after xpd reach target1"]
28pub type _0P2A_CNT_TARGET1_REACH_0_HP_W<'a, REG> = crate::BitWriter<'a, REG>;
29#[doc = "Field `_0P2A_CNT_TARGET0_REACH_1_HP` reader - reg_0p2a_0 counter after xpd reach target0"]
30pub type _0P2A_CNT_TARGET0_REACH_1_HP_R = crate::BitReader;
31#[doc = "Field `_0P2A_CNT_TARGET0_REACH_1_HP` writer - reg_0p2a_0 counter after xpd reach target0"]
32pub type _0P2A_CNT_TARGET0_REACH_1_HP_W<'a, REG> = crate::BitWriter<'a, REG>;
33#[doc = "Field `_0P2A_CNT_TARGET1_REACH_1_HP` reader - reg_0p2a_1_counter after xpd reach target1"]
34pub type _0P2A_CNT_TARGET1_REACH_1_HP_R = crate::BitReader;
35#[doc = "Field `_0P2A_CNT_TARGET1_REACH_1_HP` writer - reg_0p2a_1_counter after xpd reach target1"]
36pub type _0P2A_CNT_TARGET1_REACH_1_HP_W<'a, REG> = crate::BitWriter<'a, REG>;
37#[doc = "Field `_0P3A_CNT_TARGET0_REACH_0_HP` reader - reg_0p3a_0 counter after xpd reach target0"]
38pub type _0P3A_CNT_TARGET0_REACH_0_HP_R = crate::BitReader;
39#[doc = "Field `_0P3A_CNT_TARGET0_REACH_0_HP` writer - reg_0p3a_0 counter after xpd reach target0"]
40pub type _0P3A_CNT_TARGET0_REACH_0_HP_W<'a, REG> = crate::BitWriter<'a, REG>;
41#[doc = "Field `_0P3A_CNT_TARGET1_REACH_0_HP` reader - reg_0p3a_1_counter after xpd reach target1"]
42pub type _0P3A_CNT_TARGET1_REACH_0_HP_R = crate::BitReader;
43#[doc = "Field `_0P3A_CNT_TARGET1_REACH_0_HP` writer - reg_0p3a_1_counter after xpd reach target1"]
44pub type _0P3A_CNT_TARGET1_REACH_0_HP_W<'a, REG> = crate::BitWriter<'a, REG>;
45#[doc = "Field `_0P3A_CNT_TARGET0_REACH_1_HP` reader - reg_0p3a_0_counter after xpd reach target0"]
46pub type _0P3A_CNT_TARGET0_REACH_1_HP_R = crate::BitReader;
47#[doc = "Field `_0P3A_CNT_TARGET0_REACH_1_HP` writer - reg_0p3a_0_counter after xpd reach target0"]
48pub type _0P3A_CNT_TARGET0_REACH_1_HP_W<'a, REG> = crate::BitWriter<'a, REG>;
49#[doc = "Field `_0P3A_CNT_TARGET1_REACH_1_HP` reader - reg_0p3a_1_counter after xpd reach target1"]
50pub type _0P3A_CNT_TARGET1_REACH_1_HP_R = crate::BitReader;
51#[doc = "Field `_0P3A_CNT_TARGET1_REACH_1_HP` writer - reg_0p3a_1_counter after xpd reach target1"]
52pub type _0P3A_CNT_TARGET1_REACH_1_HP_W<'a, REG> = crate::BitWriter<'a, REG>;
53#[doc = "Field `LP_CPU_EXC` reader - need_des"]
54pub type LP_CPU_EXC_R = crate::BitReader;
55#[doc = "Field `LP_CPU_EXC` writer - need_des"]
56pub type LP_CPU_EXC_W<'a, REG> = crate::BitWriter<'a, REG>;
57#[doc = "Field `SDIO_IDLE` reader - need_des"]
58pub type SDIO_IDLE_R = crate::BitReader;
59#[doc = "Field `SDIO_IDLE` writer - need_des"]
60pub type SDIO_IDLE_W<'a, REG> = crate::BitWriter<'a, REG>;
61#[doc = "Field `SW` reader - need_des"]
62pub type SW_R = crate::BitReader;
63#[doc = "Field `SW` writer - need_des"]
64pub type SW_W<'a, REG> = crate::BitWriter<'a, REG>;
65#[doc = "Field `SOC_SLEEP_REJECT` reader - need_des"]
66pub type SOC_SLEEP_REJECT_R = crate::BitReader;
67#[doc = "Field `SOC_SLEEP_REJECT` writer - need_des"]
68pub type SOC_SLEEP_REJECT_W<'a, REG> = crate::BitWriter<'a, REG>;
69#[doc = "Field `SOC_WAKEUP` reader - need_des"]
70pub type SOC_WAKEUP_R = crate::BitReader;
71#[doc = "Field `SOC_WAKEUP` writer - need_des"]
72pub type SOC_WAKEUP_W<'a, REG> = crate::BitWriter<'a, REG>;
73impl R {
74    #[doc = "Bit 14 - reg_0p1a_0_counter after xpd reach target0"]
75    #[inline(always)]
76    pub fn _0p1a_cnt_target0_reach_0_hp(&self) -> _0P1A_CNT_TARGET0_REACH_0_HP_R {
77        _0P1A_CNT_TARGET0_REACH_0_HP_R::new(((self.bits >> 14) & 1) != 0)
78    }
79    #[doc = "Bit 15 - reg_0p1a_1_counter after xpd reach target1"]
80    #[inline(always)]
81    pub fn _0p1a_cnt_target1_reach_0_hp(&self) -> _0P1A_CNT_TARGET1_REACH_0_HP_R {
82        _0P1A_CNT_TARGET1_REACH_0_HP_R::new(((self.bits >> 15) & 1) != 0)
83    }
84    #[doc = "Bit 16 - reg_0p1a_0 counter after xpd reach target0"]
85    #[inline(always)]
86    pub fn _0p1a_cnt_target0_reach_1_hp(&self) -> _0P1A_CNT_TARGET0_REACH_1_HP_R {
87        _0P1A_CNT_TARGET0_REACH_1_HP_R::new(((self.bits >> 16) & 1) != 0)
88    }
89    #[doc = "Bit 17 - reg_0p1a_1_counter after xpd reach target1"]
90    #[inline(always)]
91    pub fn _0p1a_cnt_target1_reach_1_hp(&self) -> _0P1A_CNT_TARGET1_REACH_1_HP_R {
92        _0P1A_CNT_TARGET1_REACH_1_HP_R::new(((self.bits >> 17) & 1) != 0)
93    }
94    #[doc = "Bit 18 - reg_0p2a_0 counter after xpd reach target0"]
95    #[inline(always)]
96    pub fn _0p2a_cnt_target0_reach_0_hp(&self) -> _0P2A_CNT_TARGET0_REACH_0_HP_R {
97        _0P2A_CNT_TARGET0_REACH_0_HP_R::new(((self.bits >> 18) & 1) != 0)
98    }
99    #[doc = "Bit 19 - reg_0p2a_1_counter after xpd reach target1"]
100    #[inline(always)]
101    pub fn _0p2a_cnt_target1_reach_0_hp(&self) -> _0P2A_CNT_TARGET1_REACH_0_HP_R {
102        _0P2A_CNT_TARGET1_REACH_0_HP_R::new(((self.bits >> 19) & 1) != 0)
103    }
104    #[doc = "Bit 20 - reg_0p2a_0 counter after xpd reach target0"]
105    #[inline(always)]
106    pub fn _0p2a_cnt_target0_reach_1_hp(&self) -> _0P2A_CNT_TARGET0_REACH_1_HP_R {
107        _0P2A_CNT_TARGET0_REACH_1_HP_R::new(((self.bits >> 20) & 1) != 0)
108    }
109    #[doc = "Bit 21 - reg_0p2a_1_counter after xpd reach target1"]
110    #[inline(always)]
111    pub fn _0p2a_cnt_target1_reach_1_hp(&self) -> _0P2A_CNT_TARGET1_REACH_1_HP_R {
112        _0P2A_CNT_TARGET1_REACH_1_HP_R::new(((self.bits >> 21) & 1) != 0)
113    }
114    #[doc = "Bit 22 - reg_0p3a_0 counter after xpd reach target0"]
115    #[inline(always)]
116    pub fn _0p3a_cnt_target0_reach_0_hp(&self) -> _0P3A_CNT_TARGET0_REACH_0_HP_R {
117        _0P3A_CNT_TARGET0_REACH_0_HP_R::new(((self.bits >> 22) & 1) != 0)
118    }
119    #[doc = "Bit 23 - reg_0p3a_1_counter after xpd reach target1"]
120    #[inline(always)]
121    pub fn _0p3a_cnt_target1_reach_0_hp(&self) -> _0P3A_CNT_TARGET1_REACH_0_HP_R {
122        _0P3A_CNT_TARGET1_REACH_0_HP_R::new(((self.bits >> 23) & 1) != 0)
123    }
124    #[doc = "Bit 24 - reg_0p3a_0_counter after xpd reach target0"]
125    #[inline(always)]
126    pub fn _0p3a_cnt_target0_reach_1_hp(&self) -> _0P3A_CNT_TARGET0_REACH_1_HP_R {
127        _0P3A_CNT_TARGET0_REACH_1_HP_R::new(((self.bits >> 24) & 1) != 0)
128    }
129    #[doc = "Bit 25 - reg_0p3a_1_counter after xpd reach target1"]
130    #[inline(always)]
131    pub fn _0p3a_cnt_target1_reach_1_hp(&self) -> _0P3A_CNT_TARGET1_REACH_1_HP_R {
132        _0P3A_CNT_TARGET1_REACH_1_HP_R::new(((self.bits >> 25) & 1) != 0)
133    }
134    #[doc = "Bit 27 - need_des"]
135    #[inline(always)]
136    pub fn lp_cpu_exc(&self) -> LP_CPU_EXC_R {
137        LP_CPU_EXC_R::new(((self.bits >> 27) & 1) != 0)
138    }
139    #[doc = "Bit 28 - need_des"]
140    #[inline(always)]
141    pub fn sdio_idle(&self) -> SDIO_IDLE_R {
142        SDIO_IDLE_R::new(((self.bits >> 28) & 1) != 0)
143    }
144    #[doc = "Bit 29 - need_des"]
145    #[inline(always)]
146    pub fn sw(&self) -> SW_R {
147        SW_R::new(((self.bits >> 29) & 1) != 0)
148    }
149    #[doc = "Bit 30 - need_des"]
150    #[inline(always)]
151    pub fn soc_sleep_reject(&self) -> SOC_SLEEP_REJECT_R {
152        SOC_SLEEP_REJECT_R::new(((self.bits >> 30) & 1) != 0)
153    }
154    #[doc = "Bit 31 - need_des"]
155    #[inline(always)]
156    pub fn soc_wakeup(&self) -> SOC_WAKEUP_R {
157        SOC_WAKEUP_R::new(((self.bits >> 31) & 1) != 0)
158    }
159}
160#[cfg(feature = "impl-register-debug")]
161impl core::fmt::Debug for R {
162    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
163        f.debug_struct("INT_ENA")
164            .field(
165                "_0p1a_cnt_target0_reach_0_hp",
166                &format_args!("{}", self._0p1a_cnt_target0_reach_0_hp().bit()),
167            )
168            .field(
169                "_0p1a_cnt_target1_reach_0_hp",
170                &format_args!("{}", self._0p1a_cnt_target1_reach_0_hp().bit()),
171            )
172            .field(
173                "_0p1a_cnt_target0_reach_1_hp",
174                &format_args!("{}", self._0p1a_cnt_target0_reach_1_hp().bit()),
175            )
176            .field(
177                "_0p1a_cnt_target1_reach_1_hp",
178                &format_args!("{}", self._0p1a_cnt_target1_reach_1_hp().bit()),
179            )
180            .field(
181                "_0p2a_cnt_target0_reach_0_hp",
182                &format_args!("{}", self._0p2a_cnt_target0_reach_0_hp().bit()),
183            )
184            .field(
185                "_0p2a_cnt_target1_reach_0_hp",
186                &format_args!("{}", self._0p2a_cnt_target1_reach_0_hp().bit()),
187            )
188            .field(
189                "_0p2a_cnt_target0_reach_1_hp",
190                &format_args!("{}", self._0p2a_cnt_target0_reach_1_hp().bit()),
191            )
192            .field(
193                "_0p2a_cnt_target1_reach_1_hp",
194                &format_args!("{}", self._0p2a_cnt_target1_reach_1_hp().bit()),
195            )
196            .field(
197                "_0p3a_cnt_target0_reach_0_hp",
198                &format_args!("{}", self._0p3a_cnt_target0_reach_0_hp().bit()),
199            )
200            .field(
201                "_0p3a_cnt_target1_reach_0_hp",
202                &format_args!("{}", self._0p3a_cnt_target1_reach_0_hp().bit()),
203            )
204            .field(
205                "_0p3a_cnt_target0_reach_1_hp",
206                &format_args!("{}", self._0p3a_cnt_target0_reach_1_hp().bit()),
207            )
208            .field(
209                "_0p3a_cnt_target1_reach_1_hp",
210                &format_args!("{}", self._0p3a_cnt_target1_reach_1_hp().bit()),
211            )
212            .field("lp_cpu_exc", &format_args!("{}", self.lp_cpu_exc().bit()))
213            .field("sdio_idle", &format_args!("{}", self.sdio_idle().bit()))
214            .field("sw", &format_args!("{}", self.sw().bit()))
215            .field(
216                "soc_sleep_reject",
217                &format_args!("{}", self.soc_sleep_reject().bit()),
218            )
219            .field("soc_wakeup", &format_args!("{}", self.soc_wakeup().bit()))
220            .finish()
221    }
222}
223#[cfg(feature = "impl-register-debug")]
224impl core::fmt::Debug for crate::generic::Reg<INT_ENA_SPEC> {
225    fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result {
226        core::fmt::Debug::fmt(&self.read(), f)
227    }
228}
229impl W {
230    #[doc = "Bit 14 - reg_0p1a_0_counter after xpd reach target0"]
231    #[inline(always)]
232    #[must_use]
233    pub fn _0p1a_cnt_target0_reach_0_hp(&mut self) -> _0P1A_CNT_TARGET0_REACH_0_HP_W<INT_ENA_SPEC> {
234        _0P1A_CNT_TARGET0_REACH_0_HP_W::new(self, 14)
235    }
236    #[doc = "Bit 15 - reg_0p1a_1_counter after xpd reach target1"]
237    #[inline(always)]
238    #[must_use]
239    pub fn _0p1a_cnt_target1_reach_0_hp(&mut self) -> _0P1A_CNT_TARGET1_REACH_0_HP_W<INT_ENA_SPEC> {
240        _0P1A_CNT_TARGET1_REACH_0_HP_W::new(self, 15)
241    }
242    #[doc = "Bit 16 - reg_0p1a_0 counter after xpd reach target0"]
243    #[inline(always)]
244    #[must_use]
245    pub fn _0p1a_cnt_target0_reach_1_hp(&mut self) -> _0P1A_CNT_TARGET0_REACH_1_HP_W<INT_ENA_SPEC> {
246        _0P1A_CNT_TARGET0_REACH_1_HP_W::new(self, 16)
247    }
248    #[doc = "Bit 17 - reg_0p1a_1_counter after xpd reach target1"]
249    #[inline(always)]
250    #[must_use]
251    pub fn _0p1a_cnt_target1_reach_1_hp(&mut self) -> _0P1A_CNT_TARGET1_REACH_1_HP_W<INT_ENA_SPEC> {
252        _0P1A_CNT_TARGET1_REACH_1_HP_W::new(self, 17)
253    }
254    #[doc = "Bit 18 - reg_0p2a_0 counter after xpd reach target0"]
255    #[inline(always)]
256    #[must_use]
257    pub fn _0p2a_cnt_target0_reach_0_hp(&mut self) -> _0P2A_CNT_TARGET0_REACH_0_HP_W<INT_ENA_SPEC> {
258        _0P2A_CNT_TARGET0_REACH_0_HP_W::new(self, 18)
259    }
260    #[doc = "Bit 19 - reg_0p2a_1_counter after xpd reach target1"]
261    #[inline(always)]
262    #[must_use]
263    pub fn _0p2a_cnt_target1_reach_0_hp(&mut self) -> _0P2A_CNT_TARGET1_REACH_0_HP_W<INT_ENA_SPEC> {
264        _0P2A_CNT_TARGET1_REACH_0_HP_W::new(self, 19)
265    }
266    #[doc = "Bit 20 - reg_0p2a_0 counter after xpd reach target0"]
267    #[inline(always)]
268    #[must_use]
269    pub fn _0p2a_cnt_target0_reach_1_hp(&mut self) -> _0P2A_CNT_TARGET0_REACH_1_HP_W<INT_ENA_SPEC> {
270        _0P2A_CNT_TARGET0_REACH_1_HP_W::new(self, 20)
271    }
272    #[doc = "Bit 21 - reg_0p2a_1_counter after xpd reach target1"]
273    #[inline(always)]
274    #[must_use]
275    pub fn _0p2a_cnt_target1_reach_1_hp(&mut self) -> _0P2A_CNT_TARGET1_REACH_1_HP_W<INT_ENA_SPEC> {
276        _0P2A_CNT_TARGET1_REACH_1_HP_W::new(self, 21)
277    }
278    #[doc = "Bit 22 - reg_0p3a_0 counter after xpd reach target0"]
279    #[inline(always)]
280    #[must_use]
281    pub fn _0p3a_cnt_target0_reach_0_hp(&mut self) -> _0P3A_CNT_TARGET0_REACH_0_HP_W<INT_ENA_SPEC> {
282        _0P3A_CNT_TARGET0_REACH_0_HP_W::new(self, 22)
283    }
284    #[doc = "Bit 23 - reg_0p3a_1_counter after xpd reach target1"]
285    #[inline(always)]
286    #[must_use]
287    pub fn _0p3a_cnt_target1_reach_0_hp(&mut self) -> _0P3A_CNT_TARGET1_REACH_0_HP_W<INT_ENA_SPEC> {
288        _0P3A_CNT_TARGET1_REACH_0_HP_W::new(self, 23)
289    }
290    #[doc = "Bit 24 - reg_0p3a_0_counter after xpd reach target0"]
291    #[inline(always)]
292    #[must_use]
293    pub fn _0p3a_cnt_target0_reach_1_hp(&mut self) -> _0P3A_CNT_TARGET0_REACH_1_HP_W<INT_ENA_SPEC> {
294        _0P3A_CNT_TARGET0_REACH_1_HP_W::new(self, 24)
295    }
296    #[doc = "Bit 25 - reg_0p3a_1_counter after xpd reach target1"]
297    #[inline(always)]
298    #[must_use]
299    pub fn _0p3a_cnt_target1_reach_1_hp(&mut self) -> _0P3A_CNT_TARGET1_REACH_1_HP_W<INT_ENA_SPEC> {
300        _0P3A_CNT_TARGET1_REACH_1_HP_W::new(self, 25)
301    }
302    #[doc = "Bit 27 - need_des"]
303    #[inline(always)]
304    #[must_use]
305    pub fn lp_cpu_exc(&mut self) -> LP_CPU_EXC_W<INT_ENA_SPEC> {
306        LP_CPU_EXC_W::new(self, 27)
307    }
308    #[doc = "Bit 28 - need_des"]
309    #[inline(always)]
310    #[must_use]
311    pub fn sdio_idle(&mut self) -> SDIO_IDLE_W<INT_ENA_SPEC> {
312        SDIO_IDLE_W::new(self, 28)
313    }
314    #[doc = "Bit 29 - need_des"]
315    #[inline(always)]
316    #[must_use]
317    pub fn sw(&mut self) -> SW_W<INT_ENA_SPEC> {
318        SW_W::new(self, 29)
319    }
320    #[doc = "Bit 30 - need_des"]
321    #[inline(always)]
322    #[must_use]
323    pub fn soc_sleep_reject(&mut self) -> SOC_SLEEP_REJECT_W<INT_ENA_SPEC> {
324        SOC_SLEEP_REJECT_W::new(self, 30)
325    }
326    #[doc = "Bit 31 - need_des"]
327    #[inline(always)]
328    #[must_use]
329    pub fn soc_wakeup(&mut self) -> SOC_WAKEUP_W<INT_ENA_SPEC> {
330        SOC_WAKEUP_W::new(self, 31)
331    }
332}
333#[doc = "need_des\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`int_ena::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`int_ena::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
334pub struct INT_ENA_SPEC;
335impl crate::RegisterSpec for INT_ENA_SPEC {
336    type Ux = u32;
337}
338#[doc = "`read()` method returns [`int_ena::R`](R) reader structure"]
339impl crate::Readable for INT_ENA_SPEC {}
340#[doc = "`write(|w| ..)` method takes [`int_ena::W`](W) writer structure"]
341impl crate::Writable for INT_ENA_SPEC {
342    type Safety = crate::Unsafe;
343    const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
344    const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
345}
346#[doc = "`reset()` method sets INT_ENA to value 0"]
347impl crate::Resettable for INT_ENA_SPEC {
348    const RESET_VALUE: u32 = 0;
349}
esp32p4/pmu/int_ena.rs

esp32p4/pmu/
int_ena.rs
