esp32p4::lp_uart

Struct RegisterBlock

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#[repr(C)]
pub struct RegisterBlock { /* private fields */ }
Expand description

Register block

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impl RegisterBlock

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pub const fn fifo(&self) -> &FIFO

0x00 - FIFO data register

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pub const fn int_raw(&self) -> &INT_RAW

0x04 - Raw interrupt status

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pub const fn int_st(&self) -> &INT_ST

0x08 - Masked interrupt status

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pub const fn int_ena(&self) -> &INT_ENA

0x0c - Interrupt enable bits

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pub const fn int_clr(&self) -> &INT_CLR

0x10 - Interrupt clear bits

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pub const fn clkdiv_sync(&self) -> &CLKDIV_SYNC

0x14 - Clock divider configuration

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pub const fn rx_filt(&self) -> &RX_FILT

0x18 - Rx Filter configuration

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pub const fn status(&self) -> &STATUS

0x1c - UART status register

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pub const fn conf0_sync(&self) -> &CONF0_SYNC

0x20 - Configuration register 0

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pub const fn conf1(&self) -> &CONF1

0x24 - Configuration register 1

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pub const fn hwfc_conf_sync(&self) -> &HWFC_CONF_SYNC

0x2c - Hardware flow-control configuration

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pub const fn sleep_conf0(&self) -> &SLEEP_CONF0

0x30 - UART sleep configure register 0

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pub const fn sleep_conf1(&self) -> &SLEEP_CONF1

0x34 - UART sleep configure register 1

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pub const fn sleep_conf2(&self) -> &SLEEP_CONF2

0x38 - UART sleep configure register 2

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pub const fn swfc_conf0_sync(&self) -> &SWFC_CONF0_SYNC

0x3c - Software flow-control character configuration

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pub const fn swfc_conf1(&self) -> &SWFC_CONF1

0x40 - Software flow-control character configuration

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pub const fn txbrk_conf_sync(&self) -> &TXBRK_CONF_SYNC

0x44 - Tx Break character configuration

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pub const fn idle_conf_sync(&self) -> &IDLE_CONF_SYNC

0x48 - Frame-end idle configuration

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pub const fn rs485_conf_sync(&self) -> &RS485_CONF_SYNC

0x4c - RS485 mode configuration

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pub const fn at_cmd_precnt_sync(&self) -> &AT_CMD_PRECNT_SYNC

0x50 - Pre-sequence timing configuration

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pub const fn at_cmd_postcnt_sync(&self) -> &AT_CMD_POSTCNT_SYNC

0x54 - Post-sequence timing configuration

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pub const fn at_cmd_gaptout_sync(&self) -> &AT_CMD_GAPTOUT_SYNC

0x58 - Timeout configuration

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pub const fn at_cmd_char_sync(&self) -> &AT_CMD_CHAR_SYNC

0x5c - AT escape sequence detection configuration

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pub const fn mem_conf(&self) -> &MEM_CONF

0x60 - UART memory power configuration

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pub const fn tout_conf_sync(&self) -> &TOUT_CONF_SYNC

0x64 - UART threshold and allocation configuration

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pub const fn mem_tx_status(&self) -> &MEM_TX_STATUS

0x68 - Tx-SRAM write and read offset address.

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pub const fn mem_rx_status(&self) -> &MEM_RX_STATUS

0x6c - Rx-SRAM write and read offset address.

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pub const fn fsm_status(&self) -> &FSM_STATUS

0x70 - UART transmit and receive status.

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pub const fn clk_conf(&self) -> &CLK_CONF

0x88 - UART core clock configuration

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pub const fn date(&self) -> &DATE

0x8c - UART Version register

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pub const fn afifo_status(&self) -> &AFIFO_STATUS

0x90 - UART AFIFO Status

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pub const fn reg_update(&self) -> &REG_UPDATE

0x98 - UART Registers Configuration Update register

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pub const fn id(&self) -> &ID

0x9c - UART ID register

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