esp32p4/
spi1.rs

1#[repr(C)]
2#[cfg_attr(feature = "impl-register-debug", derive(Debug))]
3#[doc = "Register block"]
4pub struct RegisterBlock {
5    cmd: CMD,
6    addr: ADDR,
7    ctrl: CTRL,
8    ctrl1: CTRL1,
9    ctrl2: CTRL2,
10    clock: CLOCK,
11    user: USER,
12    user1: USER1,
13    user2: USER2,
14    mosi_dlen: MOSI_DLEN,
15    miso_dlen: MISO_DLEN,
16    rd_status: RD_STATUS,
17    _reserved12: [u8; 0x04],
18    misc: MISC,
19    tx_crc: TX_CRC,
20    cache_fctrl: CACHE_FCTRL,
21    _reserved15: [u8; 0x18],
22    w0: W0,
23    w1: W1,
24    w2: W2,
25    w3: W3,
26    w4: W4,
27    w5: W5,
28    w6: W6,
29    w7: W7,
30    w8: W8,
31    w9: W9,
32    w10: W10,
33    w11: W11,
34    w12: W12,
35    w13: W13,
36    w14: W14,
37    w15: W15,
38    flash_waiti_ctrl: FLASH_WAITI_CTRL,
39    flash_sus_ctrl: FLASH_SUS_CTRL,
40    flash_sus_cmd: FLASH_SUS_CMD,
41    sus_status: SUS_STATUS,
42    _reserved35: [u8; 0x18],
43    int_ena: INT_ENA,
44    int_clr: INT_CLR,
45    int_raw: INT_RAW,
46    int_st: INT_ST,
47    _reserved39: [u8; 0x04],
48    ddr: DDR,
49    _reserved40: [u8; 0xa8],
50    timing_cali: TIMING_CALI,
51    _reserved41: [u8; 0x7c],
52    clock_gate: CLOCK_GATE,
53    _reserved42: [u8; 0x01f8],
54    date: DATE,
55}
56impl RegisterBlock {
57    #[doc = "0x00 - SPI1 memory command register"]
58    #[inline(always)]
59    pub const fn cmd(&self) -> &CMD {
60        &self.cmd
61    }
62    #[doc = "0x04 - SPI1 address register"]
63    #[inline(always)]
64    pub const fn addr(&self) -> &ADDR {
65        &self.addr
66    }
67    #[doc = "0x08 - SPI1 control register."]
68    #[inline(always)]
69    pub const fn ctrl(&self) -> &CTRL {
70        &self.ctrl
71    }
72    #[doc = "0x0c - SPI1 control1 register."]
73    #[inline(always)]
74    pub const fn ctrl1(&self) -> &CTRL1 {
75        &self.ctrl1
76    }
77    #[doc = "0x10 - SPI1 control2 register."]
78    #[inline(always)]
79    pub const fn ctrl2(&self) -> &CTRL2 {
80        &self.ctrl2
81    }
82    #[doc = "0x14 - SPI1 clock division control register."]
83    #[inline(always)]
84    pub const fn clock(&self) -> &CLOCK {
85        &self.clock
86    }
87    #[doc = "0x18 - SPI1 user register."]
88    #[inline(always)]
89    pub const fn user(&self) -> &USER {
90        &self.user
91    }
92    #[doc = "0x1c - SPI1 user1 register."]
93    #[inline(always)]
94    pub const fn user1(&self) -> &USER1 {
95        &self.user1
96    }
97    #[doc = "0x20 - SPI1 user2 register."]
98    #[inline(always)]
99    pub const fn user2(&self) -> &USER2 {
100        &self.user2
101    }
102    #[doc = "0x24 - SPI1 send data bit length control register."]
103    #[inline(always)]
104    pub const fn mosi_dlen(&self) -> &MOSI_DLEN {
105        &self.mosi_dlen
106    }
107    #[doc = "0x28 - SPI1 receive data bit length control register."]
108    #[inline(always)]
109    pub const fn miso_dlen(&self) -> &MISO_DLEN {
110        &self.miso_dlen
111    }
112    #[doc = "0x2c - SPI1 status register."]
113    #[inline(always)]
114    pub const fn rd_status(&self) -> &RD_STATUS {
115        &self.rd_status
116    }
117    #[doc = "0x34 - SPI1 misc register"]
118    #[inline(always)]
119    pub const fn misc(&self) -> &MISC {
120        &self.misc
121    }
122    #[doc = "0x38 - SPI1 TX CRC data register."]
123    #[inline(always)]
124    pub const fn tx_crc(&self) -> &TX_CRC {
125        &self.tx_crc
126    }
127    #[doc = "0x3c - SPI1 bit mode control register."]
128    #[inline(always)]
129    pub const fn cache_fctrl(&self) -> &CACHE_FCTRL {
130        &self.cache_fctrl
131    }
132    #[doc = "0x58 - SPI1 memory data buffer0"]
133    #[inline(always)]
134    pub const fn w0(&self) -> &W0 {
135        &self.w0
136    }
137    #[doc = "0x5c - SPI1 memory data buffer1"]
138    #[inline(always)]
139    pub const fn w1(&self) -> &W1 {
140        &self.w1
141    }
142    #[doc = "0x60 - SPI1 memory data buffer2"]
143    #[inline(always)]
144    pub const fn w2(&self) -> &W2 {
145        &self.w2
146    }
147    #[doc = "0x64 - SPI1 memory data buffer3"]
148    #[inline(always)]
149    pub const fn w3(&self) -> &W3 {
150        &self.w3
151    }
152    #[doc = "0x68 - SPI1 memory data buffer4"]
153    #[inline(always)]
154    pub const fn w4(&self) -> &W4 {
155        &self.w4
156    }
157    #[doc = "0x6c - SPI1 memory data buffer5"]
158    #[inline(always)]
159    pub const fn w5(&self) -> &W5 {
160        &self.w5
161    }
162    #[doc = "0x70 - SPI1 memory data buffer6"]
163    #[inline(always)]
164    pub const fn w6(&self) -> &W6 {
165        &self.w6
166    }
167    #[doc = "0x74 - SPI1 memory data buffer7"]
168    #[inline(always)]
169    pub const fn w7(&self) -> &W7 {
170        &self.w7
171    }
172    #[doc = "0x78 - SPI1 memory data buffer8"]
173    #[inline(always)]
174    pub const fn w8(&self) -> &W8 {
175        &self.w8
176    }
177    #[doc = "0x7c - SPI1 memory data buffer9"]
178    #[inline(always)]
179    pub const fn w9(&self) -> &W9 {
180        &self.w9
181    }
182    #[doc = "0x80 - SPI1 memory data buffer10"]
183    #[inline(always)]
184    pub const fn w10(&self) -> &W10 {
185        &self.w10
186    }
187    #[doc = "0x84 - SPI1 memory data buffer11"]
188    #[inline(always)]
189    pub const fn w11(&self) -> &W11 {
190        &self.w11
191    }
192    #[doc = "0x88 - SPI1 memory data buffer12"]
193    #[inline(always)]
194    pub const fn w12(&self) -> &W12 {
195        &self.w12
196    }
197    #[doc = "0x8c - SPI1 memory data buffer13"]
198    #[inline(always)]
199    pub const fn w13(&self) -> &W13 {
200        &self.w13
201    }
202    #[doc = "0x90 - SPI1 memory data buffer14"]
203    #[inline(always)]
204    pub const fn w14(&self) -> &W14 {
205        &self.w14
206    }
207    #[doc = "0x94 - SPI1 memory data buffer15"]
208    #[inline(always)]
209    pub const fn w15(&self) -> &W15 {
210        &self.w15
211    }
212    #[doc = "0x98 - SPI1 wait idle control register"]
213    #[inline(always)]
214    pub const fn flash_waiti_ctrl(&self) -> &FLASH_WAITI_CTRL {
215        &self.flash_waiti_ctrl
216    }
217    #[doc = "0x9c - SPI1 flash suspend control register"]
218    #[inline(always)]
219    pub const fn flash_sus_ctrl(&self) -> &FLASH_SUS_CTRL {
220        &self.flash_sus_ctrl
221    }
222    #[doc = "0xa0 - SPI1 flash suspend command register"]
223    #[inline(always)]
224    pub const fn flash_sus_cmd(&self) -> &FLASH_SUS_CMD {
225        &self.flash_sus_cmd
226    }
227    #[doc = "0xa4 - SPI1 flash suspend status register"]
228    #[inline(always)]
229    pub const fn sus_status(&self) -> &SUS_STATUS {
230        &self.sus_status
231    }
232    #[doc = "0xc0 - SPI1 interrupt enable register"]
233    #[inline(always)]
234    pub const fn int_ena(&self) -> &INT_ENA {
235        &self.int_ena
236    }
237    #[doc = "0xc4 - SPI1 interrupt clear register"]
238    #[inline(always)]
239    pub const fn int_clr(&self) -> &INT_CLR {
240        &self.int_clr
241    }
242    #[doc = "0xc8 - SPI1 interrupt raw register"]
243    #[inline(always)]
244    pub const fn int_raw(&self) -> &INT_RAW {
245        &self.int_raw
246    }
247    #[doc = "0xcc - SPI1 interrupt status register"]
248    #[inline(always)]
249    pub const fn int_st(&self) -> &INT_ST {
250        &self.int_st
251    }
252    #[doc = "0xd4 - SPI1 DDR control register"]
253    #[inline(always)]
254    pub const fn ddr(&self) -> &DDR {
255        &self.ddr
256    }
257    #[doc = "0x180 - SPI1 timing control register"]
258    #[inline(always)]
259    pub const fn timing_cali(&self) -> &TIMING_CALI {
260        &self.timing_cali
261    }
262    #[doc = "0x200 - SPI1 clk_gate register"]
263    #[inline(always)]
264    pub const fn clock_gate(&self) -> &CLOCK_GATE {
265        &self.clock_gate
266    }
267    #[doc = "0x3fc - Version control register"]
268    #[inline(always)]
269    pub const fn date(&self) -> &DATE {
270        &self.date
271    }
272}
273#[doc = "CMD (rw) register accessor: SPI1 memory command register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cmd::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cmd::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cmd`] module"]
274pub type CMD = crate::Reg<cmd::CMD_SPEC>;
275#[doc = "SPI1 memory command register"]
276pub mod cmd;
277#[doc = "ADDR (rw) register accessor: SPI1 address register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`addr::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`addr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@addr`] module"]
278pub type ADDR = crate::Reg<addr::ADDR_SPEC>;
279#[doc = "SPI1 address register"]
280pub mod addr;
281#[doc = "CTRL (rw) register accessor: SPI1 control register.\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ctrl::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`ctrl::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ctrl`] module"]
282pub type CTRL = crate::Reg<ctrl::CTRL_SPEC>;
283#[doc = "SPI1 control register."]
284pub mod ctrl;
285#[doc = "CTRL1 (rw) register accessor: SPI1 control1 register.\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ctrl1::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`ctrl1::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ctrl1`] module"]
286pub type CTRL1 = crate::Reg<ctrl1::CTRL1_SPEC>;
287#[doc = "SPI1 control1 register."]
288pub mod ctrl1;
289#[doc = "CTRL2 (w) register accessor: SPI1 control2 register.\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`ctrl2::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ctrl2`] module"]
290pub type CTRL2 = crate::Reg<ctrl2::CTRL2_SPEC>;
291#[doc = "SPI1 control2 register."]
292pub mod ctrl2;
293#[doc = "CLOCK (rw) register accessor: SPI1 clock division control register.\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`clock::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`clock::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@clock`] module"]
294pub type CLOCK = crate::Reg<clock::CLOCK_SPEC>;
295#[doc = "SPI1 clock division control register."]
296pub mod clock;
297#[doc = "USER (rw) register accessor: SPI1 user register.\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`user::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`user::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@user`] module"]
298pub type USER = crate::Reg<user::USER_SPEC>;
299#[doc = "SPI1 user register."]
300pub mod user;
301#[doc = "USER1 (rw) register accessor: SPI1 user1 register.\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`user1::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`user1::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@user1`] module"]
302pub type USER1 = crate::Reg<user1::USER1_SPEC>;
303#[doc = "SPI1 user1 register."]
304pub mod user1;
305#[doc = "USER2 (rw) register accessor: SPI1 user2 register.\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`user2::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`user2::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@user2`] module"]
306pub type USER2 = crate::Reg<user2::USER2_SPEC>;
307#[doc = "SPI1 user2 register."]
308pub mod user2;
309#[doc = "MOSI_DLEN (rw) register accessor: SPI1 send data bit length control register.\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`mosi_dlen::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`mosi_dlen::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mosi_dlen`] module"]
310pub type MOSI_DLEN = crate::Reg<mosi_dlen::MOSI_DLEN_SPEC>;
311#[doc = "SPI1 send data bit length control register."]
312pub mod mosi_dlen;
313#[doc = "MISO_DLEN (rw) register accessor: SPI1 receive data bit length control register.\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`miso_dlen::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`miso_dlen::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@miso_dlen`] module"]
314pub type MISO_DLEN = crate::Reg<miso_dlen::MISO_DLEN_SPEC>;
315#[doc = "SPI1 receive data bit length control register."]
316pub mod miso_dlen;
317#[doc = "RD_STATUS (rw) register accessor: SPI1 status register.\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rd_status::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`rd_status::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rd_status`] module"]
318pub type RD_STATUS = crate::Reg<rd_status::RD_STATUS_SPEC>;
319#[doc = "SPI1 status register."]
320pub mod rd_status;
321#[doc = "MISC (rw) register accessor: SPI1 misc register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`misc::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`misc::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@misc`] module"]
322pub type MISC = crate::Reg<misc::MISC_SPEC>;
323#[doc = "SPI1 misc register"]
324pub mod misc;
325#[doc = "TX_CRC (r) register accessor: SPI1 TX CRC data register.\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tx_crc::R`].  See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tx_crc`] module"]
326pub type TX_CRC = crate::Reg<tx_crc::TX_CRC_SPEC>;
327#[doc = "SPI1 TX CRC data register."]
328pub mod tx_crc;
329#[doc = "CACHE_FCTRL (rw) register accessor: SPI1 bit mode control register.\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cache_fctrl::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cache_fctrl::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cache_fctrl`] module"]
330pub type CACHE_FCTRL = crate::Reg<cache_fctrl::CACHE_FCTRL_SPEC>;
331#[doc = "SPI1 bit mode control register."]
332pub mod cache_fctrl;
333#[doc = "W0 (rw) register accessor: SPI1 memory data buffer0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`w0::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`w0::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@w0`] module"]
334pub type W0 = crate::Reg<w0::W0_SPEC>;
335#[doc = "SPI1 memory data buffer0"]
336pub mod w0;
337#[doc = "W1 (rw) register accessor: SPI1 memory data buffer1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`w1::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`w1::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@w1`] module"]
338pub type W1 = crate::Reg<w1::W1_SPEC>;
339#[doc = "SPI1 memory data buffer1"]
340pub mod w1;
341#[doc = "W2 (rw) register accessor: SPI1 memory data buffer2\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`w2::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`w2::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@w2`] module"]
342pub type W2 = crate::Reg<w2::W2_SPEC>;
343#[doc = "SPI1 memory data buffer2"]
344pub mod w2;
345#[doc = "W3 (rw) register accessor: SPI1 memory data buffer3\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`w3::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`w3::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@w3`] module"]
346pub type W3 = crate::Reg<w3::W3_SPEC>;
347#[doc = "SPI1 memory data buffer3"]
348pub mod w3;
349#[doc = "W4 (rw) register accessor: SPI1 memory data buffer4\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`w4::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`w4::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@w4`] module"]
350pub type W4 = crate::Reg<w4::W4_SPEC>;
351#[doc = "SPI1 memory data buffer4"]
352pub mod w4;
353#[doc = "W5 (rw) register accessor: SPI1 memory data buffer5\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`w5::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`w5::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@w5`] module"]
354pub type W5 = crate::Reg<w5::W5_SPEC>;
355#[doc = "SPI1 memory data buffer5"]
356pub mod w5;
357#[doc = "W6 (rw) register accessor: SPI1 memory data buffer6\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`w6::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`w6::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@w6`] module"]
358pub type W6 = crate::Reg<w6::W6_SPEC>;
359#[doc = "SPI1 memory data buffer6"]
360pub mod w6;
361#[doc = "W7 (rw) register accessor: SPI1 memory data buffer7\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`w7::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`w7::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@w7`] module"]
362pub type W7 = crate::Reg<w7::W7_SPEC>;
363#[doc = "SPI1 memory data buffer7"]
364pub mod w7;
365#[doc = "W8 (rw) register accessor: SPI1 memory data buffer8\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`w8::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`w8::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@w8`] module"]
366pub type W8 = crate::Reg<w8::W8_SPEC>;
367#[doc = "SPI1 memory data buffer8"]
368pub mod w8;
369#[doc = "W9 (rw) register accessor: SPI1 memory data buffer9\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`w9::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`w9::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@w9`] module"]
370pub type W9 = crate::Reg<w9::W9_SPEC>;
371#[doc = "SPI1 memory data buffer9"]
372pub mod w9;
373#[doc = "W10 (rw) register accessor: SPI1 memory data buffer10\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`w10::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`w10::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@w10`] module"]
374pub type W10 = crate::Reg<w10::W10_SPEC>;
375#[doc = "SPI1 memory data buffer10"]
376pub mod w10;
377#[doc = "W11 (rw) register accessor: SPI1 memory data buffer11\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`w11::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`w11::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@w11`] module"]
378pub type W11 = crate::Reg<w11::W11_SPEC>;
379#[doc = "SPI1 memory data buffer11"]
380pub mod w11;
381#[doc = "W12 (rw) register accessor: SPI1 memory data buffer12\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`w12::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`w12::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@w12`] module"]
382pub type W12 = crate::Reg<w12::W12_SPEC>;
383#[doc = "SPI1 memory data buffer12"]
384pub mod w12;
385#[doc = "W13 (rw) register accessor: SPI1 memory data buffer13\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`w13::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`w13::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@w13`] module"]
386pub type W13 = crate::Reg<w13::W13_SPEC>;
387#[doc = "SPI1 memory data buffer13"]
388pub mod w13;
389#[doc = "W14 (rw) register accessor: SPI1 memory data buffer14\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`w14::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`w14::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@w14`] module"]
390pub type W14 = crate::Reg<w14::W14_SPEC>;
391#[doc = "SPI1 memory data buffer14"]
392pub mod w14;
393#[doc = "W15 (rw) register accessor: SPI1 memory data buffer15\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`w15::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`w15::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@w15`] module"]
394pub type W15 = crate::Reg<w15::W15_SPEC>;
395#[doc = "SPI1 memory data buffer15"]
396pub mod w15;
397#[doc = "FLASH_WAITI_CTRL (rw) register accessor: SPI1 wait idle control register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`flash_waiti_ctrl::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`flash_waiti_ctrl::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@flash_waiti_ctrl`] module"]
398pub type FLASH_WAITI_CTRL = crate::Reg<flash_waiti_ctrl::FLASH_WAITI_CTRL_SPEC>;
399#[doc = "SPI1 wait idle control register"]
400pub mod flash_waiti_ctrl;
401#[doc = "FLASH_SUS_CTRL (rw) register accessor: SPI1 flash suspend control register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`flash_sus_ctrl::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`flash_sus_ctrl::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@flash_sus_ctrl`] module"]
402pub type FLASH_SUS_CTRL = crate::Reg<flash_sus_ctrl::FLASH_SUS_CTRL_SPEC>;
403#[doc = "SPI1 flash suspend control register"]
404pub mod flash_sus_ctrl;
405#[doc = "FLASH_SUS_CMD (rw) register accessor: SPI1 flash suspend command register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`flash_sus_cmd::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`flash_sus_cmd::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@flash_sus_cmd`] module"]
406pub type FLASH_SUS_CMD = crate::Reg<flash_sus_cmd::FLASH_SUS_CMD_SPEC>;
407#[doc = "SPI1 flash suspend command register"]
408pub mod flash_sus_cmd;
409#[doc = "SUS_STATUS (rw) register accessor: SPI1 flash suspend status register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`sus_status::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`sus_status::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sus_status`] module"]
410pub type SUS_STATUS = crate::Reg<sus_status::SUS_STATUS_SPEC>;
411#[doc = "SPI1 flash suspend status register"]
412pub mod sus_status;
413#[doc = "INT_ENA (rw) register accessor: SPI1 interrupt enable register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`int_ena::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`int_ena::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@int_ena`] module"]
414pub type INT_ENA = crate::Reg<int_ena::INT_ENA_SPEC>;
415#[doc = "SPI1 interrupt enable register"]
416pub mod int_ena;
417#[doc = "INT_CLR (w) register accessor: SPI1 interrupt clear register\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`int_clr::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@int_clr`] module"]
418pub type INT_CLR = crate::Reg<int_clr::INT_CLR_SPEC>;
419#[doc = "SPI1 interrupt clear register"]
420pub mod int_clr;
421#[doc = "INT_RAW (rw) register accessor: SPI1 interrupt raw register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`int_raw::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`int_raw::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@int_raw`] module"]
422pub type INT_RAW = crate::Reg<int_raw::INT_RAW_SPEC>;
423#[doc = "SPI1 interrupt raw register"]
424pub mod int_raw;
425#[doc = "INT_ST (r) register accessor: SPI1 interrupt status register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`int_st::R`].  See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@int_st`] module"]
426pub type INT_ST = crate::Reg<int_st::INT_ST_SPEC>;
427#[doc = "SPI1 interrupt status register"]
428pub mod int_st;
429#[doc = "DDR (rw) register accessor: SPI1 DDR control register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ddr::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`ddr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ddr`] module"]
430pub type DDR = crate::Reg<ddr::DDR_SPEC>;
431#[doc = "SPI1 DDR control register"]
432pub mod ddr;
433#[doc = "TIMING_CALI (rw) register accessor: SPI1 timing control register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`timing_cali::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`timing_cali::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@timing_cali`] module"]
434pub type TIMING_CALI = crate::Reg<timing_cali::TIMING_CALI_SPEC>;
435#[doc = "SPI1 timing control register"]
436pub mod timing_cali;
437#[doc = "CLOCK_GATE (rw) register accessor: SPI1 clk_gate register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`clock_gate::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`clock_gate::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@clock_gate`] module"]
438pub type CLOCK_GATE = crate::Reg<clock_gate::CLOCK_GATE_SPEC>;
439#[doc = "SPI1 clk_gate register"]
440pub mod clock_gate;
441#[doc = "DATE (rw) register accessor: Version control register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`date::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`date::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@date`] module"]
442pub type DATE = crate::Reg<date::DATE_SPEC>;
443#[doc = "Version control register"]
444pub mod date;
esp32p4/spi1.rs

esp32p4/
spi1.rs
