esp32p4/mipi_dsi_host/
sdf_3d.rs

1#[doc = "Register `SDF_3D` reader"]
2pub type R = crate::R<SDF_3D_SPEC>;
3#[doc = "Register `SDF_3D` writer"]
4pub type W = crate::W<SDF_3D_SPEC>;
5#[doc = "Field `MODE_3D` reader - NA"]
6pub type MODE_3D_R = crate::FieldReader;
7#[doc = "Field `MODE_3D` writer - NA"]
8pub type MODE_3D_W<'a, REG> = crate::FieldWriter<'a, REG, 2>;
9#[doc = "Field `FORMAT_3D` reader - NA"]
10pub type FORMAT_3D_R = crate::FieldReader;
11#[doc = "Field `FORMAT_3D` writer - NA"]
12pub type FORMAT_3D_W<'a, REG> = crate::FieldWriter<'a, REG, 2>;
13#[doc = "Field `SECOND_VSYNC` reader - NA"]
14pub type SECOND_VSYNC_R = crate::BitReader;
15#[doc = "Field `SECOND_VSYNC` writer - NA"]
16pub type SECOND_VSYNC_W<'a, REG> = crate::BitWriter<'a, REG>;
17#[doc = "Field `RIGHT_FIRST` reader - NA"]
18pub type RIGHT_FIRST_R = crate::BitReader;
19#[doc = "Field `RIGHT_FIRST` writer - NA"]
20pub type RIGHT_FIRST_W<'a, REG> = crate::BitWriter<'a, REG>;
21#[doc = "Field `SEND_3D_CFG` reader - NA"]
22pub type SEND_3D_CFG_R = crate::BitReader;
23#[doc = "Field `SEND_3D_CFG` writer - NA"]
24pub type SEND_3D_CFG_W<'a, REG> = crate::BitWriter<'a, REG>;
25impl R {
26    #[doc = "Bits 0:1 - NA"]
27    #[inline(always)]
28    pub fn mode_3d(&self) -> MODE_3D_R {
29        MODE_3D_R::new((self.bits & 3) as u8)
30    }
31    #[doc = "Bits 2:3 - NA"]
32    #[inline(always)]
33    pub fn format_3d(&self) -> FORMAT_3D_R {
34        FORMAT_3D_R::new(((self.bits >> 2) & 3) as u8)
35    }
36    #[doc = "Bit 4 - NA"]
37    #[inline(always)]
38    pub fn second_vsync(&self) -> SECOND_VSYNC_R {
39        SECOND_VSYNC_R::new(((self.bits >> 4) & 1) != 0)
40    }
41    #[doc = "Bit 5 - NA"]
42    #[inline(always)]
43    pub fn right_first(&self) -> RIGHT_FIRST_R {
44        RIGHT_FIRST_R::new(((self.bits >> 5) & 1) != 0)
45    }
46    #[doc = "Bit 16 - NA"]
47    #[inline(always)]
48    pub fn send_3d_cfg(&self) -> SEND_3D_CFG_R {
49        SEND_3D_CFG_R::new(((self.bits >> 16) & 1) != 0)
50    }
51}
52#[cfg(feature = "impl-register-debug")]
53impl core::fmt::Debug for R {
54    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
55        f.debug_struct("SDF_3D")
56            .field("mode_3d", &format_args!("{}", self.mode_3d().bits()))
57            .field("format_3d", &format_args!("{}", self.format_3d().bits()))
58            .field(
59                "second_vsync",
60                &format_args!("{}", self.second_vsync().bit()),
61            )
62            .field("right_first", &format_args!("{}", self.right_first().bit()))
63            .field("send_3d_cfg", &format_args!("{}", self.send_3d_cfg().bit()))
64            .finish()
65    }
66}
67#[cfg(feature = "impl-register-debug")]
68impl core::fmt::Debug for crate::generic::Reg<SDF_3D_SPEC> {
69    fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result {
70        core::fmt::Debug::fmt(&self.read(), f)
71    }
72}
73impl W {
74    #[doc = "Bits 0:1 - NA"]
75    #[inline(always)]
76    #[must_use]
77    pub fn mode_3d(&mut self) -> MODE_3D_W<SDF_3D_SPEC> {
78        MODE_3D_W::new(self, 0)
79    }
80    #[doc = "Bits 2:3 - NA"]
81    #[inline(always)]
82    #[must_use]
83    pub fn format_3d(&mut self) -> FORMAT_3D_W<SDF_3D_SPEC> {
84        FORMAT_3D_W::new(self, 2)
85    }
86    #[doc = "Bit 4 - NA"]
87    #[inline(always)]
88    #[must_use]
89    pub fn second_vsync(&mut self) -> SECOND_VSYNC_W<SDF_3D_SPEC> {
90        SECOND_VSYNC_W::new(self, 4)
91    }
92    #[doc = "Bit 5 - NA"]
93    #[inline(always)]
94    #[must_use]
95    pub fn right_first(&mut self) -> RIGHT_FIRST_W<SDF_3D_SPEC> {
96        RIGHT_FIRST_W::new(self, 5)
97    }
98    #[doc = "Bit 16 - NA"]
99    #[inline(always)]
100    #[must_use]
101    pub fn send_3d_cfg(&mut self) -> SEND_3D_CFG_W<SDF_3D_SPEC> {
102        SEND_3D_CFG_W::new(self, 16)
103    }
104}
105#[doc = "NA\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`sdf_3d::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`sdf_3d::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
106pub struct SDF_3D_SPEC;
107impl crate::RegisterSpec for SDF_3D_SPEC {
108    type Ux = u32;
109}
110#[doc = "`read()` method returns [`sdf_3d::R`](R) reader structure"]
111impl crate::Readable for SDF_3D_SPEC {}
112#[doc = "`write(|w| ..)` method takes [`sdf_3d::W`](W) writer structure"]
113impl crate::Writable for SDF_3D_SPEC {
114    type Safety = crate::Unsafe;
115    const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
116    const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
117}
118#[doc = "`reset()` method sets SDF_3D to value 0"]
119impl crate::Resettable for SDF_3D_SPEC {
120    const RESET_VALUE: u32 = 0;
121}
esp32p4/mipi_dsi_host/sdf_3d.rs

esp32p4/mipi_dsi_host/
sdf_3d.rs
