esp32p4/lp_sys/
lp_tcm_pwr_ctrl.rs1#[doc = "Register `LP_TCM_PWR_CTRL` reader"]
2pub type R = crate::R<LP_TCM_PWR_CTRL_SPEC>;
3#[doc = "Register `LP_TCM_PWR_CTRL` writer"]
4pub type W = crate::W<LP_TCM_PWR_CTRL_SPEC>;
5#[doc = "Field `LP_TCM_ROM_CLK_FORCE_ON` reader - need_des"]
6pub type LP_TCM_ROM_CLK_FORCE_ON_R = crate::BitReader;
7#[doc = "Field `LP_TCM_ROM_CLK_FORCE_ON` writer - need_des"]
8pub type LP_TCM_ROM_CLK_FORCE_ON_W<'a, REG> = crate::BitWriter<'a, REG>;
9#[doc = "Field `LP_TCM_RAM_CLK_FORCE_ON` reader - need_des"]
10pub type LP_TCM_RAM_CLK_FORCE_ON_R = crate::BitReader;
11#[doc = "Field `LP_TCM_RAM_CLK_FORCE_ON` writer - need_des"]
12pub type LP_TCM_RAM_CLK_FORCE_ON_W<'a, REG> = crate::BitWriter<'a, REG>;
13impl R {
14 #[doc = "Bit 5 - need_des"]
15 #[inline(always)]
16 pub fn lp_tcm_rom_clk_force_on(&self) -> LP_TCM_ROM_CLK_FORCE_ON_R {
17 LP_TCM_ROM_CLK_FORCE_ON_R::new(((self.bits >> 5) & 1) != 0)
18 }
19 #[doc = "Bit 7 - need_des"]
20 #[inline(always)]
21 pub fn lp_tcm_ram_clk_force_on(&self) -> LP_TCM_RAM_CLK_FORCE_ON_R {
22 LP_TCM_RAM_CLK_FORCE_ON_R::new(((self.bits >> 7) & 1) != 0)
23 }
24}
25#[cfg(feature = "impl-register-debug")]
26impl core::fmt::Debug for R {
27 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
28 f.debug_struct("LP_TCM_PWR_CTRL")
29 .field(
30 "lp_tcm_rom_clk_force_on",
31 &format_args!("{}", self.lp_tcm_rom_clk_force_on().bit()),
32 )
33 .field(
34 "lp_tcm_ram_clk_force_on",
35 &format_args!("{}", self.lp_tcm_ram_clk_force_on().bit()),
36 )
37 .finish()
38 }
39}
40#[cfg(feature = "impl-register-debug")]
41impl core::fmt::Debug for crate::generic::Reg<LP_TCM_PWR_CTRL_SPEC> {
42 fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result {
43 core::fmt::Debug::fmt(&self.read(), f)
44 }
45}
46impl W {
47 #[doc = "Bit 5 - need_des"]
48 #[inline(always)]
49 #[must_use]
50 pub fn lp_tcm_rom_clk_force_on(&mut self) -> LP_TCM_ROM_CLK_FORCE_ON_W<LP_TCM_PWR_CTRL_SPEC> {
51 LP_TCM_ROM_CLK_FORCE_ON_W::new(self, 5)
52 }
53 #[doc = "Bit 7 - need_des"]
54 #[inline(always)]
55 #[must_use]
56 pub fn lp_tcm_ram_clk_force_on(&mut self) -> LP_TCM_RAM_CLK_FORCE_ON_W<LP_TCM_PWR_CTRL_SPEC> {
57 LP_TCM_RAM_CLK_FORCE_ON_W::new(self, 7)
58 }
59}
60#[doc = "need_des\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`lp_tcm_pwr_ctrl::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`lp_tcm_pwr_ctrl::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
61pub struct LP_TCM_PWR_CTRL_SPEC;
62impl crate::RegisterSpec for LP_TCM_PWR_CTRL_SPEC {
63 type Ux = u32;
64}
65#[doc = "`read()` method returns [`lp_tcm_pwr_ctrl::R`](R) reader structure"]
66impl crate::Readable for LP_TCM_PWR_CTRL_SPEC {}
67#[doc = "`write(|w| ..)` method takes [`lp_tcm_pwr_ctrl::W`](W) writer structure"]
68impl crate::Writable for LP_TCM_PWR_CTRL_SPEC {
69 type Safety = crate::Unsafe;
70 const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
71 const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
72}
73#[doc = "`reset()` method sets LP_TCM_PWR_CTRL to value 0"]
74impl crate::Resettable for LP_TCM_PWR_CTRL_SPEC {
75 const RESET_VALUE: u32 = 0;
76}