1#[repr(C)]
2#[cfg_attr(feature = "impl-register-debug", derive(Debug))]
3#[doc = "Register block"]
4pub struct RegisterBlock {
5 ver_date: VER_DATE,
6 clk_en: CLK_EN,
7 _reserved2: [u8; 0x08],
8 cpu_intr_from_cpu_0: CPU_INTR_FROM_CPU_0,
9 cpu_intr_from_cpu_1: CPU_INTR_FROM_CPU_1,
10 cpu_intr_from_cpu_2: CPU_INTR_FROM_CPU_2,
11 cpu_intr_from_cpu_3: CPU_INTR_FROM_CPU_3,
12 cache_clk_config: CACHE_CLK_CONFIG,
13 cache_reset_config: CACHE_RESET_CONFIG,
14 _reserved8: [u8; 0x04],
15 dma_addr_ctrl: DMA_ADDR_CTRL,
16 _reserved9: [u8; 0x04],
17 tcm_ram_wrr_config: TCM_RAM_WRR_CONFIG,
18 tcm_sw_parity_bwe_mask: TCM_SW_PARITY_BWE_MASK,
19 tcm_ram_pwr_ctrl0: TCM_RAM_PWR_CTRL0,
20 l2_rom_pwr_ctrl0: L2_ROM_PWR_CTRL0,
21 _reserved13: [u8; 0x0c],
22 probea_ctrl: PROBEA_CTRL,
23 probeb_ctrl: PROBEB_CTRL,
24 _reserved15: [u8; 0x04],
25 probe_out: PROBE_OUT,
26 l2_mem_ram_pwr_ctrl0: L2_MEM_RAM_PWR_CTRL0,
27 cpu_corestalled_st: CPU_CORESTALLED_ST,
28 _reserved18: [u8; 0x08],
29 crypto_ctrl: CRYPTO_CTRL,
30 gpio_o_hold_ctrl0: GPIO_O_HOLD_CTRL0,
31 gpio_o_hold_ctrl1: GPIO_O_HOLD_CTRL1,
32 rdn_eco_cs: RDN_ECO_CS,
33 cache_apb_postw_en: CACHE_APB_POSTW_EN,
34 l2_mem_subsize: L2_MEM_SUBSIZE,
35 _reserved24: [u8; 0x14],
36 l2_mem_int_raw: L2_MEM_INT_RAW,
37 l2_mem_int_st: L2_MEM_INT_ST,
38 l2_mem_int_ena: L2_MEM_INT_ENA,
39 l2_mem_int_clr: L2_MEM_INT_CLR,
40 l2_mem_l2_ram_ecc: L2_MEM_L2_RAM_ECC,
41 l2_mem_int_record0: L2_MEM_INT_RECORD0,
42 l2_mem_int_record1: L2_MEM_INT_RECORD1,
43 _reserved31: [u8; 0x0c],
44 l2_mem_l2_cache_ecc: L2_MEM_L2_CACHE_ECC,
45 l1cache_bus0_id: L1CACHE_BUS0_ID,
46 l1cache_bus1_id: L1CACHE_BUS1_ID,
47 _reserved34: [u8; 0x08],
48 l2_mem_rdn_eco_cs: L2_MEM_RDN_ECO_CS,
49 l2_mem_rdn_eco_low: L2_MEM_RDN_ECO_LOW,
50 l2_mem_rdn_eco_high: L2_MEM_RDN_ECO_HIGH,
51 tcm_rdn_eco_cs: TCM_RDN_ECO_CS,
52 tcm_rdn_eco_low: TCM_RDN_ECO_LOW,
53 tcm_rdn_eco_high: TCM_RDN_ECO_HIGH,
54 gpio_ded_hold_ctrl: GPIO_DED_HOLD_CTRL,
55 l2_mem_sw_ecc_bwe_mask: L2_MEM_SW_ECC_BWE_MASK,
56 usb20otg_mem_ctrl: USB20OTG_MEM_CTRL,
57 tcm_int_raw: TCM_INT_RAW,
58 tcm_int_st: TCM_INT_ST,
59 tcm_int_ena: TCM_INT_ENA,
60 tcm_int_clr: TCM_INT_CLR,
61 tcm_parity_int_record: TCM_PARITY_INT_RECORD,
62 l1_cache_pwr_ctrl: L1_CACHE_PWR_CTRL,
63 l2_cache_pwr_ctrl: L2_CACHE_PWR_CTRL,
64 cpu_waiti_conf: CPU_WAITI_CONF,
65 core_debug_runstall_conf: CORE_DEBUG_RUNSTALL_CONF,
66 core_ahb_timeout: CORE_AHB_TIMEOUT,
67 core_ibus_timeout: CORE_IBUS_TIMEOUT,
68 core_dbus_timeout: CORE_DBUS_TIMEOUT,
69 _reserved55: [u8; 0x0c],
70 icm_cpu_h2x_cfg: ICM_CPU_H2X_CFG,
71 peri1_apb_postw_en: PERI1_APB_POSTW_EN,
72 bitscrambler_peri_sel: BITSCRAMBLER_PERI_SEL,
73 apb_sync_postw_en: APB_SYNC_POSTW_EN,
74 gdma_ctrl: GDMA_CTRL,
75 gmac_ctrl0: GMAC_CTRL0,
76 gmac_ctrl1: GMAC_CTRL1,
77 gmac_ctrl2: GMAC_CTRL2,
78 vpu_ctrl: VPU_CTRL,
79 usbotg20_ctrl: USBOTG20_CTRL,
80 tcm_err_resp_ctrl: TCM_ERR_RESP_CTRL,
81 l2_mem_refresh: L2_MEM_REFRESH,
82 tcm_init: TCM_INIT,
83 tcm_parity_check_ctrl: TCM_PARITY_CHECK_CTRL,
84 design_for_verification0: DESIGN_FOR_VERIFICATION0,
85 design_for_verification1: DESIGN_FOR_VERIFICATION1,
86 _reserved71: [u8; 0x08],
87 psram_flash_addr_interchange: PSRAM_FLASH_ADDR_INTERCHANGE,
88 _reserved72: [u8; 0x04],
89 ahb2axi_bresp_err_int_raw: AHB2AXI_BRESP_ERR_INT_RAW,
90 ahb2axi_bresp_err_int_st: AHB2AXI_BRESP_ERR_INT_ST,
91 ahb2axi_bresp_err_int_ena: AHB2AXI_BRESP_ERR_INT_ENA,
92 ahb2axi_bresp_err_int_clr: AHB2AXI_BRESP_ERR_INT_CLR,
93 l2_mem_err_resp_ctrl: L2_MEM_ERR_RESP_CTRL,
94 l2_mem_ahb_buffer_ctrl: L2_MEM_AHB_BUFFER_CTRL,
95 core_dmactive_lpcore: CORE_DMACTIVE_LPCORE,
96 core_err_resp_dis: CORE_ERR_RESP_DIS,
97 core_timeout_int_raw: CORE_TIMEOUT_INT_RAW,
98 core_timeout_int_st: CORE_TIMEOUT_INT_ST,
99 core_timeout_int_ena: CORE_TIMEOUT_INT_ENA,
100 core_timeout_int_clr: CORE_TIMEOUT_INT_CLR,
101 _reserved84: [u8; 0x08],
102 gpio_o_hys_ctrl0: GPIO_O_HYS_CTRL0,
103 gpio_o_hys_ctrl1: GPIO_O_HYS_CTRL1,
104 _reserved86: [u8; 0x08],
105 rsa_pd_ctrl: RSA_PD_CTRL,
106 ecc_pd_ctrl: ECC_PD_CTRL,
107 rng_cfg: RNG_CFG,
108 uart_pd_ctrl: UART_PD_CTRL,
109 peri_mem_clk_force_on: PERI_MEM_CLK_FORCE_ON,
110}
111impl RegisterBlock {
112 #[doc = "0x00 - NA"]
113 #[inline(always)]
114 pub const fn ver_date(&self) -> &VER_DATE {
115 &self.ver_date
116 }
117 #[doc = "0x04 - NA"]
118 #[inline(always)]
119 pub const fn clk_en(&self) -> &CLK_EN {
120 &self.clk_en
121 }
122 #[doc = "0x10 - NA"]
123 #[inline(always)]
124 pub const fn cpu_intr_from_cpu_0(&self) -> &CPU_INTR_FROM_CPU_0 {
125 &self.cpu_intr_from_cpu_0
126 }
127 #[doc = "0x14 - NA"]
128 #[inline(always)]
129 pub const fn cpu_intr_from_cpu_1(&self) -> &CPU_INTR_FROM_CPU_1 {
130 &self.cpu_intr_from_cpu_1
131 }
132 #[doc = "0x18 - NA"]
133 #[inline(always)]
134 pub const fn cpu_intr_from_cpu_2(&self) -> &CPU_INTR_FROM_CPU_2 {
135 &self.cpu_intr_from_cpu_2
136 }
137 #[doc = "0x1c - NA"]
138 #[inline(always)]
139 pub const fn cpu_intr_from_cpu_3(&self) -> &CPU_INTR_FROM_CPU_3 {
140 &self.cpu_intr_from_cpu_3
141 }
142 #[doc = "0x20 - NA"]
143 #[inline(always)]
144 pub const fn cache_clk_config(&self) -> &CACHE_CLK_CONFIG {
145 &self.cache_clk_config
146 }
147 #[doc = "0x24 - NA"]
148 #[inline(always)]
149 pub const fn cache_reset_config(&self) -> &CACHE_RESET_CONFIG {
150 &self.cache_reset_config
151 }
152 #[doc = "0x2c - NA"]
153 #[inline(always)]
154 pub const fn dma_addr_ctrl(&self) -> &DMA_ADDR_CTRL {
155 &self.dma_addr_ctrl
156 }
157 #[doc = "0x34 - NA"]
158 #[inline(always)]
159 pub const fn tcm_ram_wrr_config(&self) -> &TCM_RAM_WRR_CONFIG {
160 &self.tcm_ram_wrr_config
161 }
162 #[doc = "0x38 - NA"]
163 #[inline(always)]
164 pub const fn tcm_sw_parity_bwe_mask(&self) -> &TCM_SW_PARITY_BWE_MASK {
165 &self.tcm_sw_parity_bwe_mask
166 }
167 #[doc = "0x3c - NA"]
168 #[inline(always)]
169 pub const fn tcm_ram_pwr_ctrl0(&self) -> &TCM_RAM_PWR_CTRL0 {
170 &self.tcm_ram_pwr_ctrl0
171 }
172 #[doc = "0x40 - NA"]
173 #[inline(always)]
174 pub const fn l2_rom_pwr_ctrl0(&self) -> &L2_ROM_PWR_CTRL0 {
175 &self.l2_rom_pwr_ctrl0
176 }
177 #[doc = "0x50 - NA"]
178 #[inline(always)]
179 pub const fn probea_ctrl(&self) -> &PROBEA_CTRL {
180 &self.probea_ctrl
181 }
182 #[doc = "0x54 - NA"]
183 #[inline(always)]
184 pub const fn probeb_ctrl(&self) -> &PROBEB_CTRL {
185 &self.probeb_ctrl
186 }
187 #[doc = "0x5c - NA"]
188 #[inline(always)]
189 pub const fn probe_out(&self) -> &PROBE_OUT {
190 &self.probe_out
191 }
192 #[doc = "0x60 - NA"]
193 #[inline(always)]
194 pub const fn l2_mem_ram_pwr_ctrl0(&self) -> &L2_MEM_RAM_PWR_CTRL0 {
195 &self.l2_mem_ram_pwr_ctrl0
196 }
197 #[doc = "0x64 - NA"]
198 #[inline(always)]
199 pub const fn cpu_corestalled_st(&self) -> &CPU_CORESTALLED_ST {
200 &self.cpu_corestalled_st
201 }
202 #[doc = "0x70 - NA"]
203 #[inline(always)]
204 pub const fn crypto_ctrl(&self) -> &CRYPTO_CTRL {
205 &self.crypto_ctrl
206 }
207 #[doc = "0x74 - NA"]
208 #[inline(always)]
209 pub const fn gpio_o_hold_ctrl0(&self) -> &GPIO_O_HOLD_CTRL0 {
210 &self.gpio_o_hold_ctrl0
211 }
212 #[doc = "0x78 - NA"]
213 #[inline(always)]
214 pub const fn gpio_o_hold_ctrl1(&self) -> &GPIO_O_HOLD_CTRL1 {
215 &self.gpio_o_hold_ctrl1
216 }
217 #[doc = "0x7c - NA"]
218 #[inline(always)]
219 pub const fn rdn_eco_cs(&self) -> &RDN_ECO_CS {
220 &self.rdn_eco_cs
221 }
222 #[doc = "0x80 - NA"]
223 #[inline(always)]
224 pub const fn cache_apb_postw_en(&self) -> &CACHE_APB_POSTW_EN {
225 &self.cache_apb_postw_en
226 }
227 #[doc = "0x84 - NA"]
228 #[inline(always)]
229 pub const fn l2_mem_subsize(&self) -> &L2_MEM_SUBSIZE {
230 &self.l2_mem_subsize
231 }
232 #[doc = "0x9c - NA"]
233 #[inline(always)]
234 pub const fn l2_mem_int_raw(&self) -> &L2_MEM_INT_RAW {
235 &self.l2_mem_int_raw
236 }
237 #[doc = "0xa0 - NA"]
238 #[inline(always)]
239 pub const fn l2_mem_int_st(&self) -> &L2_MEM_INT_ST {
240 &self.l2_mem_int_st
241 }
242 #[doc = "0xa4 - NA"]
243 #[inline(always)]
244 pub const fn l2_mem_int_ena(&self) -> &L2_MEM_INT_ENA {
245 &self.l2_mem_int_ena
246 }
247 #[doc = "0xa8 - NA"]
248 #[inline(always)]
249 pub const fn l2_mem_int_clr(&self) -> &L2_MEM_INT_CLR {
250 &self.l2_mem_int_clr
251 }
252 #[doc = "0xac - NA"]
253 #[inline(always)]
254 pub const fn l2_mem_l2_ram_ecc(&self) -> &L2_MEM_L2_RAM_ECC {
255 &self.l2_mem_l2_ram_ecc
256 }
257 #[doc = "0xb0 - NA"]
258 #[inline(always)]
259 pub const fn l2_mem_int_record0(&self) -> &L2_MEM_INT_RECORD0 {
260 &self.l2_mem_int_record0
261 }
262 #[doc = "0xb4 - NA"]
263 #[inline(always)]
264 pub const fn l2_mem_int_record1(&self) -> &L2_MEM_INT_RECORD1 {
265 &self.l2_mem_int_record1
266 }
267 #[doc = "0xc4 - NA"]
268 #[inline(always)]
269 pub const fn l2_mem_l2_cache_ecc(&self) -> &L2_MEM_L2_CACHE_ECC {
270 &self.l2_mem_l2_cache_ecc
271 }
272 #[doc = "0xc8 - NA"]
273 #[inline(always)]
274 pub const fn l1cache_bus0_id(&self) -> &L1CACHE_BUS0_ID {
275 &self.l1cache_bus0_id
276 }
277 #[doc = "0xcc - NA"]
278 #[inline(always)]
279 pub const fn l1cache_bus1_id(&self) -> &L1CACHE_BUS1_ID {
280 &self.l1cache_bus1_id
281 }
282 #[doc = "0xd8 - NA"]
283 #[inline(always)]
284 pub const fn l2_mem_rdn_eco_cs(&self) -> &L2_MEM_RDN_ECO_CS {
285 &self.l2_mem_rdn_eco_cs
286 }
287 #[doc = "0xdc - NA"]
288 #[inline(always)]
289 pub const fn l2_mem_rdn_eco_low(&self) -> &L2_MEM_RDN_ECO_LOW {
290 &self.l2_mem_rdn_eco_low
291 }
292 #[doc = "0xe0 - NA"]
293 #[inline(always)]
294 pub const fn l2_mem_rdn_eco_high(&self) -> &L2_MEM_RDN_ECO_HIGH {
295 &self.l2_mem_rdn_eco_high
296 }
297 #[doc = "0xe4 - NA"]
298 #[inline(always)]
299 pub const fn tcm_rdn_eco_cs(&self) -> &TCM_RDN_ECO_CS {
300 &self.tcm_rdn_eco_cs
301 }
302 #[doc = "0xe8 - NA"]
303 #[inline(always)]
304 pub const fn tcm_rdn_eco_low(&self) -> &TCM_RDN_ECO_LOW {
305 &self.tcm_rdn_eco_low
306 }
307 #[doc = "0xec - NA"]
308 #[inline(always)]
309 pub const fn tcm_rdn_eco_high(&self) -> &TCM_RDN_ECO_HIGH {
310 &self.tcm_rdn_eco_high
311 }
312 #[doc = "0xf0 - NA"]
313 #[inline(always)]
314 pub const fn gpio_ded_hold_ctrl(&self) -> &GPIO_DED_HOLD_CTRL {
315 &self.gpio_ded_hold_ctrl
316 }
317 #[doc = "0xf4 - NA"]
318 #[inline(always)]
319 pub const fn l2_mem_sw_ecc_bwe_mask(&self) -> &L2_MEM_SW_ECC_BWE_MASK {
320 &self.l2_mem_sw_ecc_bwe_mask
321 }
322 #[doc = "0xf8 - NA"]
323 #[inline(always)]
324 pub const fn usb20otg_mem_ctrl(&self) -> &USB20OTG_MEM_CTRL {
325 &self.usb20otg_mem_ctrl
326 }
327 #[doc = "0xfc - need_des"]
328 #[inline(always)]
329 pub const fn tcm_int_raw(&self) -> &TCM_INT_RAW {
330 &self.tcm_int_raw
331 }
332 #[doc = "0x100 - need_des"]
333 #[inline(always)]
334 pub const fn tcm_int_st(&self) -> &TCM_INT_ST {
335 &self.tcm_int_st
336 }
337 #[doc = "0x104 - need_des"]
338 #[inline(always)]
339 pub const fn tcm_int_ena(&self) -> &TCM_INT_ENA {
340 &self.tcm_int_ena
341 }
342 #[doc = "0x108 - need_des"]
343 #[inline(always)]
344 pub const fn tcm_int_clr(&self) -> &TCM_INT_CLR {
345 &self.tcm_int_clr
346 }
347 #[doc = "0x10c - need_des"]
348 #[inline(always)]
349 pub const fn tcm_parity_int_record(&self) -> &TCM_PARITY_INT_RECORD {
350 &self.tcm_parity_int_record
351 }
352 #[doc = "0x110 - NA"]
353 #[inline(always)]
354 pub const fn l1_cache_pwr_ctrl(&self) -> &L1_CACHE_PWR_CTRL {
355 &self.l1_cache_pwr_ctrl
356 }
357 #[doc = "0x114 - NA"]
358 #[inline(always)]
359 pub const fn l2_cache_pwr_ctrl(&self) -> &L2_CACHE_PWR_CTRL {
360 &self.l2_cache_pwr_ctrl
361 }
362 #[doc = "0x118 - CPU_WAITI configuration register"]
363 #[inline(always)]
364 pub const fn cpu_waiti_conf(&self) -> &CPU_WAITI_CONF {
365 &self.cpu_waiti_conf
366 }
367 #[doc = "0x11c - Core Debug runstall configure register"]
368 #[inline(always)]
369 pub const fn core_debug_runstall_conf(&self) -> &CORE_DEBUG_RUNSTALL_CONF {
370 &self.core_debug_runstall_conf
371 }
372 #[doc = "0x120 - need_des"]
373 #[inline(always)]
374 pub const fn core_ahb_timeout(&self) -> &CORE_AHB_TIMEOUT {
375 &self.core_ahb_timeout
376 }
377 #[doc = "0x124 - need_des"]
378 #[inline(always)]
379 pub const fn core_ibus_timeout(&self) -> &CORE_IBUS_TIMEOUT {
380 &self.core_ibus_timeout
381 }
382 #[doc = "0x128 - need_des"]
383 #[inline(always)]
384 pub const fn core_dbus_timeout(&self) -> &CORE_DBUS_TIMEOUT {
385 &self.core_dbus_timeout
386 }
387 #[doc = "0x138 - need_des"]
388 #[inline(always)]
389 pub const fn icm_cpu_h2x_cfg(&self) -> &ICM_CPU_H2X_CFG {
390 &self.icm_cpu_h2x_cfg
391 }
392 #[doc = "0x13c - NA"]
393 #[inline(always)]
394 pub const fn peri1_apb_postw_en(&self) -> &PERI1_APB_POSTW_EN {
395 &self.peri1_apb_postw_en
396 }
397 #[doc = "0x140 - Bitscrambler Peri Sel"]
398 #[inline(always)]
399 pub const fn bitscrambler_peri_sel(&self) -> &BITSCRAMBLER_PERI_SEL {
400 &self.bitscrambler_peri_sel
401 }
402 #[doc = "0x144 - N/A"]
403 #[inline(always)]
404 pub const fn apb_sync_postw_en(&self) -> &APB_SYNC_POSTW_EN {
405 &self.apb_sync_postw_en
406 }
407 #[doc = "0x148 - N/A"]
408 #[inline(always)]
409 pub const fn gdma_ctrl(&self) -> &GDMA_CTRL {
410 &self.gdma_ctrl
411 }
412 #[doc = "0x14c - N/A"]
413 #[inline(always)]
414 pub const fn gmac_ctrl0(&self) -> &GMAC_CTRL0 {
415 &self.gmac_ctrl0
416 }
417 #[doc = "0x150 - N/A"]
418 #[inline(always)]
419 pub const fn gmac_ctrl1(&self) -> &GMAC_CTRL1 {
420 &self.gmac_ctrl1
421 }
422 #[doc = "0x154 - N/A"]
423 #[inline(always)]
424 pub const fn gmac_ctrl2(&self) -> &GMAC_CTRL2 {
425 &self.gmac_ctrl2
426 }
427 #[doc = "0x158 - N/A"]
428 #[inline(always)]
429 pub const fn vpu_ctrl(&self) -> &VPU_CTRL {
430 &self.vpu_ctrl
431 }
432 #[doc = "0x15c - N/A"]
433 #[inline(always)]
434 pub const fn usbotg20_ctrl(&self) -> &USBOTG20_CTRL {
435 &self.usbotg20_ctrl
436 }
437 #[doc = "0x160 - need_des"]
438 #[inline(always)]
439 pub const fn tcm_err_resp_ctrl(&self) -> &TCM_ERR_RESP_CTRL {
440 &self.tcm_err_resp_ctrl
441 }
442 #[doc = "0x164 - NA"]
443 #[inline(always)]
444 pub const fn l2_mem_refresh(&self) -> &L2_MEM_REFRESH {
445 &self.l2_mem_refresh
446 }
447 #[doc = "0x168 - NA"]
448 #[inline(always)]
449 pub const fn tcm_init(&self) -> &TCM_INIT {
450 &self.tcm_init
451 }
452 #[doc = "0x16c - need_des"]
453 #[inline(always)]
454 pub const fn tcm_parity_check_ctrl(&self) -> &TCM_PARITY_CHECK_CTRL {
455 &self.tcm_parity_check_ctrl
456 }
457 #[doc = "0x170 - need_des"]
458 #[inline(always)]
459 pub const fn design_for_verification0(&self) -> &DESIGN_FOR_VERIFICATION0 {
460 &self.design_for_verification0
461 }
462 #[doc = "0x174 - need_des"]
463 #[inline(always)]
464 pub const fn design_for_verification1(&self) -> &DESIGN_FOR_VERIFICATION1 {
465 &self.design_for_verification1
466 }
467 #[doc = "0x180 - need_des"]
468 #[inline(always)]
469 pub const fn psram_flash_addr_interchange(&self) -> &PSRAM_FLASH_ADDR_INTERCHANGE {
470 &self.psram_flash_addr_interchange
471 }
472 #[doc = "0x188 - NA"]
473 #[inline(always)]
474 pub const fn ahb2axi_bresp_err_int_raw(&self) -> &AHB2AXI_BRESP_ERR_INT_RAW {
475 &self.ahb2axi_bresp_err_int_raw
476 }
477 #[doc = "0x18c - need_des"]
478 #[inline(always)]
479 pub const fn ahb2axi_bresp_err_int_st(&self) -> &AHB2AXI_BRESP_ERR_INT_ST {
480 &self.ahb2axi_bresp_err_int_st
481 }
482 #[doc = "0x190 - need_des"]
483 #[inline(always)]
484 pub const fn ahb2axi_bresp_err_int_ena(&self) -> &AHB2AXI_BRESP_ERR_INT_ENA {
485 &self.ahb2axi_bresp_err_int_ena
486 }
487 #[doc = "0x194 - need_des"]
488 #[inline(always)]
489 pub const fn ahb2axi_bresp_err_int_clr(&self) -> &AHB2AXI_BRESP_ERR_INT_CLR {
490 &self.ahb2axi_bresp_err_int_clr
491 }
492 #[doc = "0x198 - need_des"]
493 #[inline(always)]
494 pub const fn l2_mem_err_resp_ctrl(&self) -> &L2_MEM_ERR_RESP_CTRL {
495 &self.l2_mem_err_resp_ctrl
496 }
497 #[doc = "0x19c - need_des"]
498 #[inline(always)]
499 pub const fn l2_mem_ahb_buffer_ctrl(&self) -> &L2_MEM_AHB_BUFFER_CTRL {
500 &self.l2_mem_ahb_buffer_ctrl
501 }
502 #[doc = "0x1a0 - need_des"]
503 #[inline(always)]
504 pub const fn core_dmactive_lpcore(&self) -> &CORE_DMACTIVE_LPCORE {
505 &self.core_dmactive_lpcore
506 }
507 #[doc = "0x1a4 - need_des"]
508 #[inline(always)]
509 pub const fn core_err_resp_dis(&self) -> &CORE_ERR_RESP_DIS {
510 &self.core_err_resp_dis
511 }
512 #[doc = "0x1a8 - Hp core bus timeout interrupt raw register"]
513 #[inline(always)]
514 pub const fn core_timeout_int_raw(&self) -> &CORE_TIMEOUT_INT_RAW {
515 &self.core_timeout_int_raw
516 }
517 #[doc = "0x1ac - masked interrupt register"]
518 #[inline(always)]
519 pub const fn core_timeout_int_st(&self) -> &CORE_TIMEOUT_INT_ST {
520 &self.core_timeout_int_st
521 }
522 #[doc = "0x1b0 - masked interrupt register"]
523 #[inline(always)]
524 pub const fn core_timeout_int_ena(&self) -> &CORE_TIMEOUT_INT_ENA {
525 &self.core_timeout_int_ena
526 }
527 #[doc = "0x1b4 - interrupt clear register"]
528 #[inline(always)]
529 pub const fn core_timeout_int_clr(&self) -> &CORE_TIMEOUT_INT_CLR {
530 &self.core_timeout_int_clr
531 }
532 #[doc = "0x1c0 - NA"]
533 #[inline(always)]
534 pub const fn gpio_o_hys_ctrl0(&self) -> &GPIO_O_HYS_CTRL0 {
535 &self.gpio_o_hys_ctrl0
536 }
537 #[doc = "0x1c4 - NA"]
538 #[inline(always)]
539 pub const fn gpio_o_hys_ctrl1(&self) -> &GPIO_O_HYS_CTRL1 {
540 &self.gpio_o_hys_ctrl1
541 }
542 #[doc = "0x1d0 - rsa pd ctrl register"]
543 #[inline(always)]
544 pub const fn rsa_pd_ctrl(&self) -> &RSA_PD_CTRL {
545 &self.rsa_pd_ctrl
546 }
547 #[doc = "0x1d4 - ecc pd ctrl register"]
548 #[inline(always)]
549 pub const fn ecc_pd_ctrl(&self) -> &ECC_PD_CTRL {
550 &self.ecc_pd_ctrl
551 }
552 #[doc = "0x1d8 - rng cfg register"]
553 #[inline(always)]
554 pub const fn rng_cfg(&self) -> &RNG_CFG {
555 &self.rng_cfg
556 }
557 #[doc = "0x1dc - ecc pd ctrl register"]
558 #[inline(always)]
559 pub const fn uart_pd_ctrl(&self) -> &UART_PD_CTRL {
560 &self.uart_pd_ctrl
561 }
562 #[doc = "0x1e0 - hp peri mem clk force on regpster"]
563 #[inline(always)]
564 pub const fn peri_mem_clk_force_on(&self) -> &PERI_MEM_CLK_FORCE_ON {
565 &self.peri_mem_clk_force_on
566 }
567}
568#[doc = "VER_DATE (rw) register accessor: NA\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ver_date::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`ver_date::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ver_date`] module"]
569pub type VER_DATE = crate::Reg<ver_date::VER_DATE_SPEC>;
570#[doc = "NA"]
571pub mod ver_date;
572#[doc = "CLK_EN (rw) register accessor: NA\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`clk_en::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`clk_en::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@clk_en`] module"]
573pub type CLK_EN = crate::Reg<clk_en::CLK_EN_SPEC>;
574#[doc = "NA"]
575pub mod clk_en;
576#[doc = "CPU_INTR_FROM_CPU_0 (rw) register accessor: NA\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cpu_intr_from_cpu_0::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cpu_intr_from_cpu_0::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cpu_intr_from_cpu_0`] module"]
577pub type CPU_INTR_FROM_CPU_0 = crate::Reg<cpu_intr_from_cpu_0::CPU_INTR_FROM_CPU_0_SPEC>;
578#[doc = "NA"]
579pub mod cpu_intr_from_cpu_0;
580#[doc = "CPU_INTR_FROM_CPU_1 (rw) register accessor: NA\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cpu_intr_from_cpu_1::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cpu_intr_from_cpu_1::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cpu_intr_from_cpu_1`] module"]
581pub type CPU_INTR_FROM_CPU_1 = crate::Reg<cpu_intr_from_cpu_1::CPU_INTR_FROM_CPU_1_SPEC>;
582#[doc = "NA"]
583pub mod cpu_intr_from_cpu_1;
584#[doc = "CPU_INTR_FROM_CPU_2 (rw) register accessor: NA\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cpu_intr_from_cpu_2::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cpu_intr_from_cpu_2::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cpu_intr_from_cpu_2`] module"]
585pub type CPU_INTR_FROM_CPU_2 = crate::Reg<cpu_intr_from_cpu_2::CPU_INTR_FROM_CPU_2_SPEC>;
586#[doc = "NA"]
587pub mod cpu_intr_from_cpu_2;
588#[doc = "CPU_INTR_FROM_CPU_3 (rw) register accessor: NA\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cpu_intr_from_cpu_3::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cpu_intr_from_cpu_3::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cpu_intr_from_cpu_3`] module"]
589pub type CPU_INTR_FROM_CPU_3 = crate::Reg<cpu_intr_from_cpu_3::CPU_INTR_FROM_CPU_3_SPEC>;
590#[doc = "NA"]
591pub mod cpu_intr_from_cpu_3;
592#[doc = "CACHE_CLK_CONFIG (rw) register accessor: NA\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cache_clk_config::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cache_clk_config::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cache_clk_config`] module"]
593pub type CACHE_CLK_CONFIG = crate::Reg<cache_clk_config::CACHE_CLK_CONFIG_SPEC>;
594#[doc = "NA"]
595pub mod cache_clk_config;
596#[doc = "CACHE_RESET_CONFIG (rw) register accessor: NA\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cache_reset_config::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cache_reset_config::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cache_reset_config`] module"]
597pub type CACHE_RESET_CONFIG = crate::Reg<cache_reset_config::CACHE_RESET_CONFIG_SPEC>;
598#[doc = "NA"]
599pub mod cache_reset_config;
600#[doc = "DMA_ADDR_CTRL (rw) register accessor: NA\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dma_addr_ctrl::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dma_addr_ctrl::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dma_addr_ctrl`] module"]
601pub type DMA_ADDR_CTRL = crate::Reg<dma_addr_ctrl::DMA_ADDR_CTRL_SPEC>;
602#[doc = "NA"]
603pub mod dma_addr_ctrl;
604#[doc = "TCM_RAM_WRR_CONFIG (rw) register accessor: NA\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tcm_ram_wrr_config::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`tcm_ram_wrr_config::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tcm_ram_wrr_config`] module"]
605pub type TCM_RAM_WRR_CONFIG = crate::Reg<tcm_ram_wrr_config::TCM_RAM_WRR_CONFIG_SPEC>;
606#[doc = "NA"]
607pub mod tcm_ram_wrr_config;
608#[doc = "TCM_SW_PARITY_BWE_MASK (rw) register accessor: NA\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tcm_sw_parity_bwe_mask::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`tcm_sw_parity_bwe_mask::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tcm_sw_parity_bwe_mask`] module"]
609pub type TCM_SW_PARITY_BWE_MASK = crate::Reg<tcm_sw_parity_bwe_mask::TCM_SW_PARITY_BWE_MASK_SPEC>;
610#[doc = "NA"]
611pub mod tcm_sw_parity_bwe_mask;
612#[doc = "TCM_RAM_PWR_CTRL0 (rw) register accessor: NA\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tcm_ram_pwr_ctrl0::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`tcm_ram_pwr_ctrl0::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tcm_ram_pwr_ctrl0`] module"]
613pub type TCM_RAM_PWR_CTRL0 = crate::Reg<tcm_ram_pwr_ctrl0::TCM_RAM_PWR_CTRL0_SPEC>;
614#[doc = "NA"]
615pub mod tcm_ram_pwr_ctrl0;
616#[doc = "L2_ROM_PWR_CTRL0 (rw) register accessor: NA\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`l2_rom_pwr_ctrl0::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`l2_rom_pwr_ctrl0::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@l2_rom_pwr_ctrl0`] module"]
617pub type L2_ROM_PWR_CTRL0 = crate::Reg<l2_rom_pwr_ctrl0::L2_ROM_PWR_CTRL0_SPEC>;
618#[doc = "NA"]
619pub mod l2_rom_pwr_ctrl0;
620#[doc = "PROBEA_CTRL (rw) register accessor: NA\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`probea_ctrl::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`probea_ctrl::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@probea_ctrl`] module"]
621pub type PROBEA_CTRL = crate::Reg<probea_ctrl::PROBEA_CTRL_SPEC>;
622#[doc = "NA"]
623pub mod probea_ctrl;
624#[doc = "PROBEB_CTRL (rw) register accessor: NA\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`probeb_ctrl::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`probeb_ctrl::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@probeb_ctrl`] module"]
625pub type PROBEB_CTRL = crate::Reg<probeb_ctrl::PROBEB_CTRL_SPEC>;
626#[doc = "NA"]
627pub mod probeb_ctrl;
628#[doc = "PROBE_OUT (r) register accessor: NA\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`probe_out::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@probe_out`] module"]
629pub type PROBE_OUT = crate::Reg<probe_out::PROBE_OUT_SPEC>;
630#[doc = "NA"]
631pub mod probe_out;
632#[doc = "L2_MEM_RAM_PWR_CTRL0 (rw) register accessor: NA\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`l2_mem_ram_pwr_ctrl0::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`l2_mem_ram_pwr_ctrl0::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@l2_mem_ram_pwr_ctrl0`] module"]
633pub type L2_MEM_RAM_PWR_CTRL0 = crate::Reg<l2_mem_ram_pwr_ctrl0::L2_MEM_RAM_PWR_CTRL0_SPEC>;
634#[doc = "NA"]
635pub mod l2_mem_ram_pwr_ctrl0;
636#[doc = "CPU_CORESTALLED_ST (r) register accessor: NA\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cpu_corestalled_st::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cpu_corestalled_st`] module"]
637pub type CPU_CORESTALLED_ST = crate::Reg<cpu_corestalled_st::CPU_CORESTALLED_ST_SPEC>;
638#[doc = "NA"]
639pub mod cpu_corestalled_st;
640#[doc = "CRYPTO_CTRL (rw) register accessor: NA\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`crypto_ctrl::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`crypto_ctrl::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@crypto_ctrl`] module"]
641pub type CRYPTO_CTRL = crate::Reg<crypto_ctrl::CRYPTO_CTRL_SPEC>;
642#[doc = "NA"]
643pub mod crypto_ctrl;
644#[doc = "GPIO_O_HOLD_CTRL0 (rw) register accessor: NA\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gpio_o_hold_ctrl0::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gpio_o_hold_ctrl0::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@gpio_o_hold_ctrl0`] module"]
645pub type GPIO_O_HOLD_CTRL0 = crate::Reg<gpio_o_hold_ctrl0::GPIO_O_HOLD_CTRL0_SPEC>;
646#[doc = "NA"]
647pub mod gpio_o_hold_ctrl0;
648#[doc = "GPIO_O_HOLD_CTRL1 (rw) register accessor: NA\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gpio_o_hold_ctrl1::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gpio_o_hold_ctrl1::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@gpio_o_hold_ctrl1`] module"]
649pub type GPIO_O_HOLD_CTRL1 = crate::Reg<gpio_o_hold_ctrl1::GPIO_O_HOLD_CTRL1_SPEC>;
650#[doc = "NA"]
651pub mod gpio_o_hold_ctrl1;
652#[doc = "RDN_ECO_CS (rw) register accessor: NA\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rdn_eco_cs::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`rdn_eco_cs::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rdn_eco_cs`] module"]
653pub type RDN_ECO_CS = crate::Reg<rdn_eco_cs::RDN_ECO_CS_SPEC>;
654#[doc = "NA"]
655pub mod rdn_eco_cs;
656#[doc = "CACHE_APB_POSTW_EN (rw) register accessor: NA\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cache_apb_postw_en::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cache_apb_postw_en::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cache_apb_postw_en`] module"]
657pub type CACHE_APB_POSTW_EN = crate::Reg<cache_apb_postw_en::CACHE_APB_POSTW_EN_SPEC>;
658#[doc = "NA"]
659pub mod cache_apb_postw_en;
660#[doc = "L2_MEM_SUBSIZE (rw) register accessor: NA\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`l2_mem_subsize::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`l2_mem_subsize::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@l2_mem_subsize`] module"]
661pub type L2_MEM_SUBSIZE = crate::Reg<l2_mem_subsize::L2_MEM_SUBSIZE_SPEC>;
662#[doc = "NA"]
663pub mod l2_mem_subsize;
664#[doc = "L2_MEM_INT_RAW (rw) register accessor: NA\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`l2_mem_int_raw::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`l2_mem_int_raw::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@l2_mem_int_raw`] module"]
665pub type L2_MEM_INT_RAW = crate::Reg<l2_mem_int_raw::L2_MEM_INT_RAW_SPEC>;
666#[doc = "NA"]
667pub mod l2_mem_int_raw;
668#[doc = "L2_MEM_INT_ST (r) register accessor: NA\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`l2_mem_int_st::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@l2_mem_int_st`] module"]
669pub type L2_MEM_INT_ST = crate::Reg<l2_mem_int_st::L2_MEM_INT_ST_SPEC>;
670#[doc = "NA"]
671pub mod l2_mem_int_st;
672#[doc = "L2_MEM_INT_ENA (rw) register accessor: NA\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`l2_mem_int_ena::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`l2_mem_int_ena::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@l2_mem_int_ena`] module"]
673pub type L2_MEM_INT_ENA = crate::Reg<l2_mem_int_ena::L2_MEM_INT_ENA_SPEC>;
674#[doc = "NA"]
675pub mod l2_mem_int_ena;
676#[doc = "L2_MEM_INT_CLR (w) register accessor: NA\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`l2_mem_int_clr::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@l2_mem_int_clr`] module"]
677pub type L2_MEM_INT_CLR = crate::Reg<l2_mem_int_clr::L2_MEM_INT_CLR_SPEC>;
678#[doc = "NA"]
679pub mod l2_mem_int_clr;
680#[doc = "L2_MEM_L2_RAM_ECC (rw) register accessor: NA\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`l2_mem_l2_ram_ecc::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`l2_mem_l2_ram_ecc::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@l2_mem_l2_ram_ecc`] module"]
681pub type L2_MEM_L2_RAM_ECC = crate::Reg<l2_mem_l2_ram_ecc::L2_MEM_L2_RAM_ECC_SPEC>;
682#[doc = "NA"]
683pub mod l2_mem_l2_ram_ecc;
684#[doc = "L2_MEM_INT_RECORD0 (r) register accessor: NA\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`l2_mem_int_record0::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@l2_mem_int_record0`] module"]
685pub type L2_MEM_INT_RECORD0 = crate::Reg<l2_mem_int_record0::L2_MEM_INT_RECORD0_SPEC>;
686#[doc = "NA"]
687pub mod l2_mem_int_record0;
688#[doc = "L2_MEM_INT_RECORD1 (r) register accessor: NA\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`l2_mem_int_record1::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@l2_mem_int_record1`] module"]
689pub type L2_MEM_INT_RECORD1 = crate::Reg<l2_mem_int_record1::L2_MEM_INT_RECORD1_SPEC>;
690#[doc = "NA"]
691pub mod l2_mem_int_record1;
692#[doc = "L2_MEM_L2_CACHE_ECC (rw) register accessor: NA\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`l2_mem_l2_cache_ecc::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`l2_mem_l2_cache_ecc::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@l2_mem_l2_cache_ecc`] module"]
693pub type L2_MEM_L2_CACHE_ECC = crate::Reg<l2_mem_l2_cache_ecc::L2_MEM_L2_CACHE_ECC_SPEC>;
694#[doc = "NA"]
695pub mod l2_mem_l2_cache_ecc;
696#[doc = "L1CACHE_BUS0_ID (rw) register accessor: NA\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`l1cache_bus0_id::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`l1cache_bus0_id::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@l1cache_bus0_id`] module"]
697pub type L1CACHE_BUS0_ID = crate::Reg<l1cache_bus0_id::L1CACHE_BUS0_ID_SPEC>;
698#[doc = "NA"]
699pub mod l1cache_bus0_id;
700#[doc = "L1CACHE_BUS1_ID (rw) register accessor: NA\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`l1cache_bus1_id::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`l1cache_bus1_id::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@l1cache_bus1_id`] module"]
701pub type L1CACHE_BUS1_ID = crate::Reg<l1cache_bus1_id::L1CACHE_BUS1_ID_SPEC>;
702#[doc = "NA"]
703pub mod l1cache_bus1_id;
704#[doc = "L2_MEM_RDN_ECO_CS (rw) register accessor: NA\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`l2_mem_rdn_eco_cs::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`l2_mem_rdn_eco_cs::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@l2_mem_rdn_eco_cs`] module"]
705pub type L2_MEM_RDN_ECO_CS = crate::Reg<l2_mem_rdn_eco_cs::L2_MEM_RDN_ECO_CS_SPEC>;
706#[doc = "NA"]
707pub mod l2_mem_rdn_eco_cs;
708#[doc = "L2_MEM_RDN_ECO_LOW (rw) register accessor: NA\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`l2_mem_rdn_eco_low::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`l2_mem_rdn_eco_low::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@l2_mem_rdn_eco_low`] module"]
709pub type L2_MEM_RDN_ECO_LOW = crate::Reg<l2_mem_rdn_eco_low::L2_MEM_RDN_ECO_LOW_SPEC>;
710#[doc = "NA"]
711pub mod l2_mem_rdn_eco_low;
712#[doc = "L2_MEM_RDN_ECO_HIGH (rw) register accessor: NA\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`l2_mem_rdn_eco_high::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`l2_mem_rdn_eco_high::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@l2_mem_rdn_eco_high`] module"]
713pub type L2_MEM_RDN_ECO_HIGH = crate::Reg<l2_mem_rdn_eco_high::L2_MEM_RDN_ECO_HIGH_SPEC>;
714#[doc = "NA"]
715pub mod l2_mem_rdn_eco_high;
716#[doc = "TCM_RDN_ECO_CS (rw) register accessor: NA\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tcm_rdn_eco_cs::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`tcm_rdn_eco_cs::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tcm_rdn_eco_cs`] module"]
717pub type TCM_RDN_ECO_CS = crate::Reg<tcm_rdn_eco_cs::TCM_RDN_ECO_CS_SPEC>;
718#[doc = "NA"]
719pub mod tcm_rdn_eco_cs;
720#[doc = "TCM_RDN_ECO_LOW (rw) register accessor: NA\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tcm_rdn_eco_low::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`tcm_rdn_eco_low::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tcm_rdn_eco_low`] module"]
721pub type TCM_RDN_ECO_LOW = crate::Reg<tcm_rdn_eco_low::TCM_RDN_ECO_LOW_SPEC>;
722#[doc = "NA"]
723pub mod tcm_rdn_eco_low;
724#[doc = "TCM_RDN_ECO_HIGH (rw) register accessor: NA\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tcm_rdn_eco_high::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`tcm_rdn_eco_high::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tcm_rdn_eco_high`] module"]
725pub type TCM_RDN_ECO_HIGH = crate::Reg<tcm_rdn_eco_high::TCM_RDN_ECO_HIGH_SPEC>;
726#[doc = "NA"]
727pub mod tcm_rdn_eco_high;
728#[doc = "GPIO_DED_HOLD_CTRL (rw) register accessor: NA\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gpio_ded_hold_ctrl::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gpio_ded_hold_ctrl::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@gpio_ded_hold_ctrl`] module"]
729pub type GPIO_DED_HOLD_CTRL = crate::Reg<gpio_ded_hold_ctrl::GPIO_DED_HOLD_CTRL_SPEC>;
730#[doc = "NA"]
731pub mod gpio_ded_hold_ctrl;
732#[doc = "L2_MEM_SW_ECC_BWE_MASK (rw) register accessor: NA\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`l2_mem_sw_ecc_bwe_mask::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`l2_mem_sw_ecc_bwe_mask::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@l2_mem_sw_ecc_bwe_mask`] module"]
733pub type L2_MEM_SW_ECC_BWE_MASK = crate::Reg<l2_mem_sw_ecc_bwe_mask::L2_MEM_SW_ECC_BWE_MASK_SPEC>;
734#[doc = "NA"]
735pub mod l2_mem_sw_ecc_bwe_mask;
736#[doc = "USB20OTG_MEM_CTRL (rw) register accessor: NA\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`usb20otg_mem_ctrl::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`usb20otg_mem_ctrl::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@usb20otg_mem_ctrl`] module"]
737pub type USB20OTG_MEM_CTRL = crate::Reg<usb20otg_mem_ctrl::USB20OTG_MEM_CTRL_SPEC>;
738#[doc = "NA"]
739pub mod usb20otg_mem_ctrl;
740#[doc = "TCM_INT_RAW (rw) register accessor: need_des\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tcm_int_raw::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`tcm_int_raw::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tcm_int_raw`] module"]
741pub type TCM_INT_RAW = crate::Reg<tcm_int_raw::TCM_INT_RAW_SPEC>;
742#[doc = "need_des"]
743pub mod tcm_int_raw;
744#[doc = "TCM_INT_ST (r) register accessor: need_des\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tcm_int_st::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tcm_int_st`] module"]
745pub type TCM_INT_ST = crate::Reg<tcm_int_st::TCM_INT_ST_SPEC>;
746#[doc = "need_des"]
747pub mod tcm_int_st;
748#[doc = "TCM_INT_ENA (rw) register accessor: need_des\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tcm_int_ena::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`tcm_int_ena::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tcm_int_ena`] module"]
749pub type TCM_INT_ENA = crate::Reg<tcm_int_ena::TCM_INT_ENA_SPEC>;
750#[doc = "need_des"]
751pub mod tcm_int_ena;
752#[doc = "TCM_INT_CLR (w) register accessor: need_des\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`tcm_int_clr::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tcm_int_clr`] module"]
753pub type TCM_INT_CLR = crate::Reg<tcm_int_clr::TCM_INT_CLR_SPEC>;
754#[doc = "need_des"]
755pub mod tcm_int_clr;
756#[doc = "TCM_PARITY_INT_RECORD (r) register accessor: need_des\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tcm_parity_int_record::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tcm_parity_int_record`] module"]
757pub type TCM_PARITY_INT_RECORD = crate::Reg<tcm_parity_int_record::TCM_PARITY_INT_RECORD_SPEC>;
758#[doc = "need_des"]
759pub mod tcm_parity_int_record;
760#[doc = "L1_CACHE_PWR_CTRL (rw) register accessor: NA\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`l1_cache_pwr_ctrl::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`l1_cache_pwr_ctrl::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@l1_cache_pwr_ctrl`] module"]
761pub type L1_CACHE_PWR_CTRL = crate::Reg<l1_cache_pwr_ctrl::L1_CACHE_PWR_CTRL_SPEC>;
762#[doc = "NA"]
763pub mod l1_cache_pwr_ctrl;
764#[doc = "L2_CACHE_PWR_CTRL (rw) register accessor: NA\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`l2_cache_pwr_ctrl::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`l2_cache_pwr_ctrl::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@l2_cache_pwr_ctrl`] module"]
765pub type L2_CACHE_PWR_CTRL = crate::Reg<l2_cache_pwr_ctrl::L2_CACHE_PWR_CTRL_SPEC>;
766#[doc = "NA"]
767pub mod l2_cache_pwr_ctrl;
768#[doc = "CPU_WAITI_CONF (rw) register accessor: CPU_WAITI configuration register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cpu_waiti_conf::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cpu_waiti_conf::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cpu_waiti_conf`] module"]
769pub type CPU_WAITI_CONF = crate::Reg<cpu_waiti_conf::CPU_WAITI_CONF_SPEC>;
770#[doc = "CPU_WAITI configuration register"]
771pub mod cpu_waiti_conf;
772#[doc = "CORE_DEBUG_RUNSTALL_CONF (rw) register accessor: Core Debug runstall configure register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`core_debug_runstall_conf::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`core_debug_runstall_conf::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@core_debug_runstall_conf`] module"]
773pub type CORE_DEBUG_RUNSTALL_CONF =
774 crate::Reg<core_debug_runstall_conf::CORE_DEBUG_RUNSTALL_CONF_SPEC>;
775#[doc = "Core Debug runstall configure register"]
776pub mod core_debug_runstall_conf;
777#[doc = "CORE_AHB_TIMEOUT (rw) register accessor: need_des\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`core_ahb_timeout::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`core_ahb_timeout::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@core_ahb_timeout`] module"]
778pub type CORE_AHB_TIMEOUT = crate::Reg<core_ahb_timeout::CORE_AHB_TIMEOUT_SPEC>;
779#[doc = "need_des"]
780pub mod core_ahb_timeout;
781#[doc = "CORE_IBUS_TIMEOUT (rw) register accessor: need_des\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`core_ibus_timeout::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`core_ibus_timeout::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@core_ibus_timeout`] module"]
782pub type CORE_IBUS_TIMEOUT = crate::Reg<core_ibus_timeout::CORE_IBUS_TIMEOUT_SPEC>;
783#[doc = "need_des"]
784pub mod core_ibus_timeout;
785#[doc = "CORE_DBUS_TIMEOUT (rw) register accessor: need_des\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`core_dbus_timeout::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`core_dbus_timeout::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@core_dbus_timeout`] module"]
786pub type CORE_DBUS_TIMEOUT = crate::Reg<core_dbus_timeout::CORE_DBUS_TIMEOUT_SPEC>;
787#[doc = "need_des"]
788pub mod core_dbus_timeout;
789#[doc = "ICM_CPU_H2X_CFG (rw) register accessor: need_des\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`icm_cpu_h2x_cfg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`icm_cpu_h2x_cfg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@icm_cpu_h2x_cfg`] module"]
790pub type ICM_CPU_H2X_CFG = crate::Reg<icm_cpu_h2x_cfg::ICM_CPU_H2X_CFG_SPEC>;
791#[doc = "need_des"]
792pub mod icm_cpu_h2x_cfg;
793#[doc = "PERI1_APB_POSTW_EN (rw) register accessor: NA\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`peri1_apb_postw_en::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`peri1_apb_postw_en::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@peri1_apb_postw_en`] module"]
794pub type PERI1_APB_POSTW_EN = crate::Reg<peri1_apb_postw_en::PERI1_APB_POSTW_EN_SPEC>;
795#[doc = "NA"]
796pub mod peri1_apb_postw_en;
797#[doc = "BITSCRAMBLER_PERI_SEL (rw) register accessor: Bitscrambler Peri Sel\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`bitscrambler_peri_sel::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`bitscrambler_peri_sel::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@bitscrambler_peri_sel`] module"]
798pub type BITSCRAMBLER_PERI_SEL = crate::Reg<bitscrambler_peri_sel::BITSCRAMBLER_PERI_SEL_SPEC>;
799#[doc = "Bitscrambler Peri Sel"]
800pub mod bitscrambler_peri_sel;
801#[doc = "APB_SYNC_POSTW_EN (rw) register accessor: N/A\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`apb_sync_postw_en::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`apb_sync_postw_en::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@apb_sync_postw_en`] module"]
802pub type APB_SYNC_POSTW_EN = crate::Reg<apb_sync_postw_en::APB_SYNC_POSTW_EN_SPEC>;
803#[doc = "N/A"]
804pub mod apb_sync_postw_en;
805#[doc = "GDMA_CTRL (rw) register accessor: N/A\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gdma_ctrl::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gdma_ctrl::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@gdma_ctrl`] module"]
806pub type GDMA_CTRL = crate::Reg<gdma_ctrl::GDMA_CTRL_SPEC>;
807#[doc = "N/A"]
808pub mod gdma_ctrl;
809#[doc = "GMAC_CTRL0 (rw) register accessor: N/A\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gmac_ctrl0::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gmac_ctrl0::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@gmac_ctrl0`] module"]
810pub type GMAC_CTRL0 = crate::Reg<gmac_ctrl0::GMAC_CTRL0_SPEC>;
811#[doc = "N/A"]
812pub mod gmac_ctrl0;
813#[doc = "GMAC_CTRL1 (r) register accessor: N/A\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gmac_ctrl1::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@gmac_ctrl1`] module"]
814pub type GMAC_CTRL1 = crate::Reg<gmac_ctrl1::GMAC_CTRL1_SPEC>;
815#[doc = "N/A"]
816pub mod gmac_ctrl1;
817#[doc = "GMAC_CTRL2 (r) register accessor: N/A\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gmac_ctrl2::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@gmac_ctrl2`] module"]
818pub type GMAC_CTRL2 = crate::Reg<gmac_ctrl2::GMAC_CTRL2_SPEC>;
819#[doc = "N/A"]
820pub mod gmac_ctrl2;
821#[doc = "VPU_CTRL (rw) register accessor: N/A\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`vpu_ctrl::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`vpu_ctrl::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@vpu_ctrl`] module"]
822pub type VPU_CTRL = crate::Reg<vpu_ctrl::VPU_CTRL_SPEC>;
823#[doc = "N/A"]
824pub mod vpu_ctrl;
825#[doc = "USBOTG20_CTRL (rw) register accessor: N/A\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`usbotg20_ctrl::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`usbotg20_ctrl::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@usbotg20_ctrl`] module"]
826pub type USBOTG20_CTRL = crate::Reg<usbotg20_ctrl::USBOTG20_CTRL_SPEC>;
827#[doc = "N/A"]
828pub mod usbotg20_ctrl;
829#[doc = "TCM_ERR_RESP_CTRL (rw) register accessor: need_des\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tcm_err_resp_ctrl::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`tcm_err_resp_ctrl::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tcm_err_resp_ctrl`] module"]
830pub type TCM_ERR_RESP_CTRL = crate::Reg<tcm_err_resp_ctrl::TCM_ERR_RESP_CTRL_SPEC>;
831#[doc = "need_des"]
832pub mod tcm_err_resp_ctrl;
833#[doc = "L2_MEM_REFRESH (rw) register accessor: NA\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`l2_mem_refresh::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`l2_mem_refresh::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@l2_mem_refresh`] module"]
834pub type L2_MEM_REFRESH = crate::Reg<l2_mem_refresh::L2_MEM_REFRESH_SPEC>;
835#[doc = "NA"]
836pub mod l2_mem_refresh;
837#[doc = "TCM_INIT (rw) register accessor: NA\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tcm_init::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`tcm_init::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tcm_init`] module"]
838pub type TCM_INIT = crate::Reg<tcm_init::TCM_INIT_SPEC>;
839#[doc = "NA"]
840pub mod tcm_init;
841#[doc = "TCM_PARITY_CHECK_CTRL (rw) register accessor: need_des\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tcm_parity_check_ctrl::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`tcm_parity_check_ctrl::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tcm_parity_check_ctrl`] module"]
842pub type TCM_PARITY_CHECK_CTRL = crate::Reg<tcm_parity_check_ctrl::TCM_PARITY_CHECK_CTRL_SPEC>;
843#[doc = "need_des"]
844pub mod tcm_parity_check_ctrl;
845#[doc = "DESIGN_FOR_VERIFICATION0 (rw) register accessor: need_des\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`design_for_verification0::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`design_for_verification0::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@design_for_verification0`] module"]
846pub type DESIGN_FOR_VERIFICATION0 =
847 crate::Reg<design_for_verification0::DESIGN_FOR_VERIFICATION0_SPEC>;
848#[doc = "need_des"]
849pub mod design_for_verification0;
850#[doc = "DESIGN_FOR_VERIFICATION1 (rw) register accessor: need_des\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`design_for_verification1::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`design_for_verification1::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@design_for_verification1`] module"]
851pub type DESIGN_FOR_VERIFICATION1 =
852 crate::Reg<design_for_verification1::DESIGN_FOR_VERIFICATION1_SPEC>;
853#[doc = "need_des"]
854pub mod design_for_verification1;
855#[doc = "PSRAM_FLASH_ADDR_INTERCHANGE (rw) register accessor: need_des\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`psram_flash_addr_interchange::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`psram_flash_addr_interchange::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@psram_flash_addr_interchange`] module"]
856pub type PSRAM_FLASH_ADDR_INTERCHANGE =
857 crate::Reg<psram_flash_addr_interchange::PSRAM_FLASH_ADDR_INTERCHANGE_SPEC>;
858#[doc = "need_des"]
859pub mod psram_flash_addr_interchange;
860#[doc = "AHB2AXI_BRESP_ERR_INT_RAW (rw) register accessor: NA\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ahb2axi_bresp_err_int_raw::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`ahb2axi_bresp_err_int_raw::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ahb2axi_bresp_err_int_raw`] module"]
861pub type AHB2AXI_BRESP_ERR_INT_RAW =
862 crate::Reg<ahb2axi_bresp_err_int_raw::AHB2AXI_BRESP_ERR_INT_RAW_SPEC>;
863#[doc = "NA"]
864pub mod ahb2axi_bresp_err_int_raw;
865#[doc = "AHB2AXI_BRESP_ERR_INT_ST (r) register accessor: need_des\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ahb2axi_bresp_err_int_st::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ahb2axi_bresp_err_int_st`] module"]
866pub type AHB2AXI_BRESP_ERR_INT_ST =
867 crate::Reg<ahb2axi_bresp_err_int_st::AHB2AXI_BRESP_ERR_INT_ST_SPEC>;
868#[doc = "need_des"]
869pub mod ahb2axi_bresp_err_int_st;
870#[doc = "AHB2AXI_BRESP_ERR_INT_ENA (rw) register accessor: need_des\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ahb2axi_bresp_err_int_ena::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`ahb2axi_bresp_err_int_ena::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ahb2axi_bresp_err_int_ena`] module"]
871pub type AHB2AXI_BRESP_ERR_INT_ENA =
872 crate::Reg<ahb2axi_bresp_err_int_ena::AHB2AXI_BRESP_ERR_INT_ENA_SPEC>;
873#[doc = "need_des"]
874pub mod ahb2axi_bresp_err_int_ena;
875#[doc = "AHB2AXI_BRESP_ERR_INT_CLR (w) register accessor: need_des\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`ahb2axi_bresp_err_int_clr::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ahb2axi_bresp_err_int_clr`] module"]
876pub type AHB2AXI_BRESP_ERR_INT_CLR =
877 crate::Reg<ahb2axi_bresp_err_int_clr::AHB2AXI_BRESP_ERR_INT_CLR_SPEC>;
878#[doc = "need_des"]
879pub mod ahb2axi_bresp_err_int_clr;
880#[doc = "L2_MEM_ERR_RESP_CTRL (rw) register accessor: need_des\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`l2_mem_err_resp_ctrl::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`l2_mem_err_resp_ctrl::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@l2_mem_err_resp_ctrl`] module"]
881pub type L2_MEM_ERR_RESP_CTRL = crate::Reg<l2_mem_err_resp_ctrl::L2_MEM_ERR_RESP_CTRL_SPEC>;
882#[doc = "need_des"]
883pub mod l2_mem_err_resp_ctrl;
884#[doc = "L2_MEM_AHB_BUFFER_CTRL (rw) register accessor: need_des\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`l2_mem_ahb_buffer_ctrl::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`l2_mem_ahb_buffer_ctrl::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@l2_mem_ahb_buffer_ctrl`] module"]
885pub type L2_MEM_AHB_BUFFER_CTRL = crate::Reg<l2_mem_ahb_buffer_ctrl::L2_MEM_AHB_BUFFER_CTRL_SPEC>;
886#[doc = "need_des"]
887pub mod l2_mem_ahb_buffer_ctrl;
888#[doc = "CORE_DMACTIVE_LPCORE (r) register accessor: need_des\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`core_dmactive_lpcore::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@core_dmactive_lpcore`] module"]
889pub type CORE_DMACTIVE_LPCORE = crate::Reg<core_dmactive_lpcore::CORE_DMACTIVE_LPCORE_SPEC>;
890#[doc = "need_des"]
891pub mod core_dmactive_lpcore;
892#[doc = "CORE_ERR_RESP_DIS (rw) register accessor: need_des\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`core_err_resp_dis::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`core_err_resp_dis::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@core_err_resp_dis`] module"]
893pub type CORE_ERR_RESP_DIS = crate::Reg<core_err_resp_dis::CORE_ERR_RESP_DIS_SPEC>;
894#[doc = "need_des"]
895pub mod core_err_resp_dis;
896#[doc = "CORE_TIMEOUT_INT_RAW (rw) register accessor: Hp core bus timeout interrupt raw register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`core_timeout_int_raw::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`core_timeout_int_raw::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@core_timeout_int_raw`] module"]
897pub type CORE_TIMEOUT_INT_RAW = crate::Reg<core_timeout_int_raw::CORE_TIMEOUT_INT_RAW_SPEC>;
898#[doc = "Hp core bus timeout interrupt raw register"]
899pub mod core_timeout_int_raw;
900#[doc = "CORE_TIMEOUT_INT_ST (r) register accessor: masked interrupt register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`core_timeout_int_st::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@core_timeout_int_st`] module"]
901pub type CORE_TIMEOUT_INT_ST = crate::Reg<core_timeout_int_st::CORE_TIMEOUT_INT_ST_SPEC>;
902#[doc = "masked interrupt register"]
903pub mod core_timeout_int_st;
904#[doc = "CORE_TIMEOUT_INT_ENA (rw) register accessor: masked interrupt register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`core_timeout_int_ena::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`core_timeout_int_ena::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@core_timeout_int_ena`] module"]
905pub type CORE_TIMEOUT_INT_ENA = crate::Reg<core_timeout_int_ena::CORE_TIMEOUT_INT_ENA_SPEC>;
906#[doc = "masked interrupt register"]
907pub mod core_timeout_int_ena;
908#[doc = "CORE_TIMEOUT_INT_CLR (w) register accessor: interrupt clear register\n\nYou can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`core_timeout_int_clr::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@core_timeout_int_clr`] module"]
909pub type CORE_TIMEOUT_INT_CLR = crate::Reg<core_timeout_int_clr::CORE_TIMEOUT_INT_CLR_SPEC>;
910#[doc = "interrupt clear register"]
911pub mod core_timeout_int_clr;
912#[doc = "GPIO_O_HYS_CTRL0 (rw) register accessor: NA\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gpio_o_hys_ctrl0::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gpio_o_hys_ctrl0::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@gpio_o_hys_ctrl0`] module"]
913pub type GPIO_O_HYS_CTRL0 = crate::Reg<gpio_o_hys_ctrl0::GPIO_O_HYS_CTRL0_SPEC>;
914#[doc = "NA"]
915pub mod gpio_o_hys_ctrl0;
916#[doc = "GPIO_O_HYS_CTRL1 (rw) register accessor: NA\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gpio_o_hys_ctrl1::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gpio_o_hys_ctrl1::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@gpio_o_hys_ctrl1`] module"]
917pub type GPIO_O_HYS_CTRL1 = crate::Reg<gpio_o_hys_ctrl1::GPIO_O_HYS_CTRL1_SPEC>;
918#[doc = "NA"]
919pub mod gpio_o_hys_ctrl1;
920#[doc = "RSA_PD_CTRL (rw) register accessor: rsa pd ctrl register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rsa_pd_ctrl::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`rsa_pd_ctrl::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rsa_pd_ctrl`] module"]
921pub type RSA_PD_CTRL = crate::Reg<rsa_pd_ctrl::RSA_PD_CTRL_SPEC>;
922#[doc = "rsa pd ctrl register"]
923pub mod rsa_pd_ctrl;
924#[doc = "ECC_PD_CTRL (rw) register accessor: ecc pd ctrl register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ecc_pd_ctrl::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`ecc_pd_ctrl::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ecc_pd_ctrl`] module"]
925pub type ECC_PD_CTRL = crate::Reg<ecc_pd_ctrl::ECC_PD_CTRL_SPEC>;
926#[doc = "ecc pd ctrl register"]
927pub mod ecc_pd_ctrl;
928#[doc = "RNG_CFG (rw) register accessor: rng cfg register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rng_cfg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`rng_cfg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rng_cfg`] module"]
929pub type RNG_CFG = crate::Reg<rng_cfg::RNG_CFG_SPEC>;
930#[doc = "rng cfg register"]
931pub mod rng_cfg;
932#[doc = "UART_PD_CTRL (rw) register accessor: ecc pd ctrl register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`uart_pd_ctrl::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`uart_pd_ctrl::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@uart_pd_ctrl`] module"]
933pub type UART_PD_CTRL = crate::Reg<uart_pd_ctrl::UART_PD_CTRL_SPEC>;
934#[doc = "ecc pd ctrl register"]
935pub mod uart_pd_ctrl;
936#[doc = "PERI_MEM_CLK_FORCE_ON (rw) register accessor: hp peri mem clk force on regpster\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`peri_mem_clk_force_on::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`peri_mem_clk_force_on::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@peri_mem_clk_force_on`] module"]
937pub type PERI_MEM_CLK_FORCE_ON = crate::Reg<peri_mem_clk_force_on::PERI_MEM_CLK_FORCE_ON_SPEC>;
938#[doc = "hp peri mem clk force on regpster"]
939pub mod peri_mem_clk_force_on;