esp32h2/apb_saradc/
int_raw.rs1#[doc = "Register `INT_RAW` reader"]
2pub type R = crate::R<INT_RAW_SPEC>;
3#[doc = "Register `INT_RAW` writer"]
4pub type W = crate::W<INT_RAW_SPEC>;
5#[doc = "Field `TSENS` reader - saradc tsens interrupt raw"]
6pub type TSENS_R = crate::BitReader;
7#[doc = "Field `TSENS` writer - saradc tsens interrupt raw"]
8pub type TSENS_W<'a, REG> = crate::BitWriter<'a, REG>;
9#[doc = "Field `THRES1_LOW` reader - saradc thres1 low interrupt raw"]
10pub type THRES1_LOW_R = crate::BitReader;
11#[doc = "Field `THRES1_LOW` writer - saradc thres1 low interrupt raw"]
12pub type THRES1_LOW_W<'a, REG> = crate::BitWriter<'a, REG>;
13#[doc = "Field `THRES0_LOW` reader - saradc thres0 low interrupt raw"]
14pub type THRES0_LOW_R = crate::BitReader;
15#[doc = "Field `THRES0_LOW` writer - saradc thres0 low interrupt raw"]
16pub type THRES0_LOW_W<'a, REG> = crate::BitWriter<'a, REG>;
17#[doc = "Field `THRES1_HIGH` reader - saradc thres1 high interrupt raw"]
18pub type THRES1_HIGH_R = crate::BitReader;
19#[doc = "Field `THRES1_HIGH` writer - saradc thres1 high interrupt raw"]
20pub type THRES1_HIGH_W<'a, REG> = crate::BitWriter<'a, REG>;
21#[doc = "Field `THRES0_HIGH` reader - saradc thres0 high interrupt raw"]
22pub type THRES0_HIGH_R = crate::BitReader;
23#[doc = "Field `THRES0_HIGH` writer - saradc thres0 high interrupt raw"]
24pub type THRES0_HIGH_W<'a, REG> = crate::BitWriter<'a, REG>;
25#[doc = "Field `ADC2_DONE` reader - saradc2 done interrupt raw"]
26pub type ADC2_DONE_R = crate::BitReader;
27#[doc = "Field `ADC2_DONE` writer - saradc2 done interrupt raw"]
28pub type ADC2_DONE_W<'a, REG> = crate::BitWriter<'a, REG>;
29#[doc = "Field `ADC1_DONE` reader - saradc1 done interrupt raw"]
30pub type ADC1_DONE_R = crate::BitReader;
31#[doc = "Field `ADC1_DONE` writer - saradc1 done interrupt raw"]
32pub type ADC1_DONE_W<'a, REG> = crate::BitWriter<'a, REG>;
33impl R {
34 #[doc = "Bit 25 - saradc tsens interrupt raw"]
35 #[inline(always)]
36 pub fn tsens(&self) -> TSENS_R {
37 TSENS_R::new(((self.bits >> 25) & 1) != 0)
38 }
39 #[doc = "Bit 26 - saradc thres1 low interrupt raw"]
40 #[inline(always)]
41 pub fn thres1_low(&self) -> THRES1_LOW_R {
42 THRES1_LOW_R::new(((self.bits >> 26) & 1) != 0)
43 }
44 #[doc = "Bit 27 - saradc thres0 low interrupt raw"]
45 #[inline(always)]
46 pub fn thres0_low(&self) -> THRES0_LOW_R {
47 THRES0_LOW_R::new(((self.bits >> 27) & 1) != 0)
48 }
49 #[doc = "Bit 28 - saradc thres1 high interrupt raw"]
50 #[inline(always)]
51 pub fn thres1_high(&self) -> THRES1_HIGH_R {
52 THRES1_HIGH_R::new(((self.bits >> 28) & 1) != 0)
53 }
54 #[doc = "Bit 29 - saradc thres0 high interrupt raw"]
55 #[inline(always)]
56 pub fn thres0_high(&self) -> THRES0_HIGH_R {
57 THRES0_HIGH_R::new(((self.bits >> 29) & 1) != 0)
58 }
59 #[doc = "Bit 30 - saradc2 done interrupt raw"]
60 #[inline(always)]
61 pub fn adc2_done(&self) -> ADC2_DONE_R {
62 ADC2_DONE_R::new(((self.bits >> 30) & 1) != 0)
63 }
64 #[doc = "Bit 31 - saradc1 done interrupt raw"]
65 #[inline(always)]
66 pub fn adc1_done(&self) -> ADC1_DONE_R {
67 ADC1_DONE_R::new(((self.bits >> 31) & 1) != 0)
68 }
69}
70#[cfg(feature = "impl-register-debug")]
71impl core::fmt::Debug for R {
72 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
73 f.debug_struct("INT_RAW")
74 .field("tsens", &self.tsens())
75 .field("thres1_low", &self.thres1_low())
76 .field("thres0_low", &self.thres0_low())
77 .field("thres1_high", &self.thres1_high())
78 .field("thres0_high", &self.thres0_high())
79 .field("adc2_done", &self.adc2_done())
80 .field("adc1_done", &self.adc1_done())
81 .finish()
82 }
83}
84impl W {
85 #[doc = "Bit 25 - saradc tsens interrupt raw"]
86 #[inline(always)]
87 pub fn tsens(&mut self) -> TSENS_W<INT_RAW_SPEC> {
88 TSENS_W::new(self, 25)
89 }
90 #[doc = "Bit 26 - saradc thres1 low interrupt raw"]
91 #[inline(always)]
92 pub fn thres1_low(&mut self) -> THRES1_LOW_W<INT_RAW_SPEC> {
93 THRES1_LOW_W::new(self, 26)
94 }
95 #[doc = "Bit 27 - saradc thres0 low interrupt raw"]
96 #[inline(always)]
97 pub fn thres0_low(&mut self) -> THRES0_LOW_W<INT_RAW_SPEC> {
98 THRES0_LOW_W::new(self, 27)
99 }
100 #[doc = "Bit 28 - saradc thres1 high interrupt raw"]
101 #[inline(always)]
102 pub fn thres1_high(&mut self) -> THRES1_HIGH_W<INT_RAW_SPEC> {
103 THRES1_HIGH_W::new(self, 28)
104 }
105 #[doc = "Bit 29 - saradc thres0 high interrupt raw"]
106 #[inline(always)]
107 pub fn thres0_high(&mut self) -> THRES0_HIGH_W<INT_RAW_SPEC> {
108 THRES0_HIGH_W::new(self, 29)
109 }
110 #[doc = "Bit 30 - saradc2 done interrupt raw"]
111 #[inline(always)]
112 pub fn adc2_done(&mut self) -> ADC2_DONE_W<INT_RAW_SPEC> {
113 ADC2_DONE_W::new(self, 30)
114 }
115 #[doc = "Bit 31 - saradc1 done interrupt raw"]
116 #[inline(always)]
117 pub fn adc1_done(&mut self) -> ADC1_DONE_W<INT_RAW_SPEC> {
118 ADC1_DONE_W::new(self, 31)
119 }
120}
121#[doc = "digital saradc int register\n\nYou can [`read`](crate::Reg::read) this register and get [`int_raw::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`int_raw::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
122pub struct INT_RAW_SPEC;
123impl crate::RegisterSpec for INT_RAW_SPEC {
124 type Ux = u32;
125}
126#[doc = "`read()` method returns [`int_raw::R`](R) reader structure"]
127impl crate::Readable for INT_RAW_SPEC {}
128#[doc = "`write(|w| ..)` method takes [`int_raw::W`](W) writer structure"]
129impl crate::Writable for INT_RAW_SPEC {
130 type Safety = crate::Unsafe;
131 const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
132 const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
133}
134#[doc = "`reset()` method sets INT_RAW to value 0"]
135impl crate::Resettable for INT_RAW_SPEC {
136 const RESET_VALUE: u32 = 0;
137}