Module clk_gate

Source
Expand description

SPI module clock and register clock control

Structs§

CLK_GATE_SPEC
SPI module clock and register clock control

Type Aliases§

CLK_EN_R
Field CLK_EN reader - Set this bit to enable clk gate
CLK_EN_W
Field CLK_EN writer - Set this bit to enable clk gate
MST_CLK_ACTIVE_R
Field MST_CLK_ACTIVE reader - Set this bit to power on the SPI module clock.
MST_CLK_ACTIVE_W
Field MST_CLK_ACTIVE writer - Set this bit to power on the SPI module clock.
MST_CLK_SEL_R
Field MST_CLK_SEL reader - This bit is used to select SPI module clock source in master mode. 1: PLL_CLK_80M. 0: XTAL CLK.
MST_CLK_SEL_W
Field MST_CLK_SEL writer - This bit is used to select SPI module clock source in master mode. 1: PLL_CLK_80M. 0: XTAL CLK.
R
Register CLK_GATE reader
W
Register CLK_GATE writer