esp32h2/spi2/
dma_int_set.rs

1#[doc = "Register `DMA_INT_SET` writer"]
2pub type W = crate::W<DMA_INT_SET_SPEC>;
3#[doc = "Field `DMA_INFIFO_FULL_ERR_INT_SET` writer - The software set bit for SPI_DMA_INFIFO_FULL_ERR_INT interrupt."]
4pub type DMA_INFIFO_FULL_ERR_INT_SET_W<'a, REG> = crate::BitWriter<'a, REG>;
5#[doc = "Field `DMA_OUTFIFO_EMPTY_ERR_INT_SET` writer - The software set bit for SPI_DMA_OUTFIFO_EMPTY_ERR_INT interrupt."]
6pub type DMA_OUTFIFO_EMPTY_ERR_INT_SET_W<'a, REG> = crate::BitWriter<'a, REG>;
7#[doc = "Field `SLV_EX_QPI_INT_SET` writer - The software set bit for SPI slave Ex_QPI interrupt."]
8pub type SLV_EX_QPI_INT_SET_W<'a, REG> = crate::BitWriter<'a, REG>;
9#[doc = "Field `SLV_EN_QPI_INT_SET` writer - The software set bit for SPI slave En_QPI interrupt."]
10pub type SLV_EN_QPI_INT_SET_W<'a, REG> = crate::BitWriter<'a, REG>;
11#[doc = "Field `SLV_CMD7_INT_SET` writer - The software set bit for SPI slave CMD7 interrupt."]
12pub type SLV_CMD7_INT_SET_W<'a, REG> = crate::BitWriter<'a, REG>;
13#[doc = "Field `SLV_CMD8_INT_SET` writer - The software set bit for SPI slave CMD8 interrupt."]
14pub type SLV_CMD8_INT_SET_W<'a, REG> = crate::BitWriter<'a, REG>;
15#[doc = "Field `SLV_CMD9_INT_SET` writer - The software set bit for SPI slave CMD9 interrupt."]
16pub type SLV_CMD9_INT_SET_W<'a, REG> = crate::BitWriter<'a, REG>;
17#[doc = "Field `SLV_CMDA_INT_SET` writer - The software set bit for SPI slave CMDA interrupt."]
18pub type SLV_CMDA_INT_SET_W<'a, REG> = crate::BitWriter<'a, REG>;
19#[doc = "Field `SLV_RD_DMA_DONE_INT_SET` writer - The software set bit for SPI_SLV_RD_DMA_DONE_INT interrupt."]
20pub type SLV_RD_DMA_DONE_INT_SET_W<'a, REG> = crate::BitWriter<'a, REG>;
21#[doc = "Field `SLV_WR_DMA_DONE_INT_SET` writer - The software set bit for SPI_SLV_WR_DMA_DONE_INT interrupt."]
22pub type SLV_WR_DMA_DONE_INT_SET_W<'a, REG> = crate::BitWriter<'a, REG>;
23#[doc = "Field `SLV_RD_BUF_DONE_INT_SET` writer - The software set bit for SPI_SLV_RD_BUF_DONE_INT interrupt."]
24pub type SLV_RD_BUF_DONE_INT_SET_W<'a, REG> = crate::BitWriter<'a, REG>;
25#[doc = "Field `SLV_WR_BUF_DONE_INT_SET` writer - The software set bit for SPI_SLV_WR_BUF_DONE_INT interrupt."]
26pub type SLV_WR_BUF_DONE_INT_SET_W<'a, REG> = crate::BitWriter<'a, REG>;
27#[doc = "Field `TRANS_DONE_INT_SET` writer - The software set bit for SPI_TRANS_DONE_INT interrupt."]
28pub type TRANS_DONE_INT_SET_W<'a, REG> = crate::BitWriter<'a, REG>;
29#[doc = "Field `DMA_SEG_TRANS_DONE_INT_SET` writer - The software set bit for SPI_DMA_SEG_TRANS_DONE_INT interrupt."]
30pub type DMA_SEG_TRANS_DONE_INT_SET_W<'a, REG> = crate::BitWriter<'a, REG>;
31#[doc = "Field `SEG_MAGIC_ERR_INT_SET` writer - The software set bit for SPI_SEG_MAGIC_ERR_INT interrupt."]
32pub type SEG_MAGIC_ERR_INT_SET_W<'a, REG> = crate::BitWriter<'a, REG>;
33#[doc = "Field `SLV_BUF_ADDR_ERR_INT_SET` writer - The software set bit for SPI_SLV_BUF_ADDR_ERR_INT interrupt."]
34pub type SLV_BUF_ADDR_ERR_INT_SET_W<'a, REG> = crate::BitWriter<'a, REG>;
35#[doc = "Field `SLV_CMD_ERR_INT_SET` writer - The software set bit for SPI_SLV_CMD_ERR_INT interrupt."]
36pub type SLV_CMD_ERR_INT_SET_W<'a, REG> = crate::BitWriter<'a, REG>;
37#[doc = "Field `MST_RX_AFIFO_WFULL_ERR_INT_SET` writer - The software set bit for SPI_MST_RX_AFIFO_WFULL_ERR_INT interrupt."]
38pub type MST_RX_AFIFO_WFULL_ERR_INT_SET_W<'a, REG> = crate::BitWriter<'a, REG>;
39#[doc = "Field `MST_TX_AFIFO_REMPTY_ERR_INT_SET` writer - The software set bit for SPI_MST_TX_AFIFO_REMPTY_ERR_INT interrupt."]
40pub type MST_TX_AFIFO_REMPTY_ERR_INT_SET_W<'a, REG> = crate::BitWriter<'a, REG>;
41#[doc = "Field `APP2_INT_SET` writer - The software set bit for SPI_APP2_INT interrupt."]
42pub type APP2_INT_SET_W<'a, REG> = crate::BitWriter<'a, REG>;
43#[doc = "Field `APP1_INT_SET` writer - The software set bit for SPI_APP1_INT interrupt."]
44pub type APP1_INT_SET_W<'a, REG> = crate::BitWriter<'a, REG>;
45#[cfg(feature = "impl-register-debug")]
46impl core::fmt::Debug for crate::generic::Reg<DMA_INT_SET_SPEC> {
47    fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result {
48        write!(f, "(not readable)")
49    }
50}
51impl W {
52    #[doc = "Bit 0 - The software set bit for SPI_DMA_INFIFO_FULL_ERR_INT interrupt."]
53    #[inline(always)]
54    pub fn dma_infifo_full_err_int_set(
55        &mut self,
56    ) -> DMA_INFIFO_FULL_ERR_INT_SET_W<DMA_INT_SET_SPEC> {
57        DMA_INFIFO_FULL_ERR_INT_SET_W::new(self, 0)
58    }
59    #[doc = "Bit 1 - The software set bit for SPI_DMA_OUTFIFO_EMPTY_ERR_INT interrupt."]
60    #[inline(always)]
61    pub fn dma_outfifo_empty_err_int_set(
62        &mut self,
63    ) -> DMA_OUTFIFO_EMPTY_ERR_INT_SET_W<DMA_INT_SET_SPEC> {
64        DMA_OUTFIFO_EMPTY_ERR_INT_SET_W::new(self, 1)
65    }
66    #[doc = "Bit 2 - The software set bit for SPI slave Ex_QPI interrupt."]
67    #[inline(always)]
68    pub fn slv_ex_qpi_int_set(&mut self) -> SLV_EX_QPI_INT_SET_W<DMA_INT_SET_SPEC> {
69        SLV_EX_QPI_INT_SET_W::new(self, 2)
70    }
71    #[doc = "Bit 3 - The software set bit for SPI slave En_QPI interrupt."]
72    #[inline(always)]
73    pub fn slv_en_qpi_int_set(&mut self) -> SLV_EN_QPI_INT_SET_W<DMA_INT_SET_SPEC> {
74        SLV_EN_QPI_INT_SET_W::new(self, 3)
75    }
76    #[doc = "Bit 4 - The software set bit for SPI slave CMD7 interrupt."]
77    #[inline(always)]
78    pub fn slv_cmd7_int_set(&mut self) -> SLV_CMD7_INT_SET_W<DMA_INT_SET_SPEC> {
79        SLV_CMD7_INT_SET_W::new(self, 4)
80    }
81    #[doc = "Bit 5 - The software set bit for SPI slave CMD8 interrupt."]
82    #[inline(always)]
83    pub fn slv_cmd8_int_set(&mut self) -> SLV_CMD8_INT_SET_W<DMA_INT_SET_SPEC> {
84        SLV_CMD8_INT_SET_W::new(self, 5)
85    }
86    #[doc = "Bit 6 - The software set bit for SPI slave CMD9 interrupt."]
87    #[inline(always)]
88    pub fn slv_cmd9_int_set(&mut self) -> SLV_CMD9_INT_SET_W<DMA_INT_SET_SPEC> {
89        SLV_CMD9_INT_SET_W::new(self, 6)
90    }
91    #[doc = "Bit 7 - The software set bit for SPI slave CMDA interrupt."]
92    #[inline(always)]
93    pub fn slv_cmda_int_set(&mut self) -> SLV_CMDA_INT_SET_W<DMA_INT_SET_SPEC> {
94        SLV_CMDA_INT_SET_W::new(self, 7)
95    }
96    #[doc = "Bit 8 - The software set bit for SPI_SLV_RD_DMA_DONE_INT interrupt."]
97    #[inline(always)]
98    pub fn slv_rd_dma_done_int_set(&mut self) -> SLV_RD_DMA_DONE_INT_SET_W<DMA_INT_SET_SPEC> {
99        SLV_RD_DMA_DONE_INT_SET_W::new(self, 8)
100    }
101    #[doc = "Bit 9 - The software set bit for SPI_SLV_WR_DMA_DONE_INT interrupt."]
102    #[inline(always)]
103    pub fn slv_wr_dma_done_int_set(&mut self) -> SLV_WR_DMA_DONE_INT_SET_W<DMA_INT_SET_SPEC> {
104        SLV_WR_DMA_DONE_INT_SET_W::new(self, 9)
105    }
106    #[doc = "Bit 10 - The software set bit for SPI_SLV_RD_BUF_DONE_INT interrupt."]
107    #[inline(always)]
108    pub fn slv_rd_buf_done_int_set(&mut self) -> SLV_RD_BUF_DONE_INT_SET_W<DMA_INT_SET_SPEC> {
109        SLV_RD_BUF_DONE_INT_SET_W::new(self, 10)
110    }
111    #[doc = "Bit 11 - The software set bit for SPI_SLV_WR_BUF_DONE_INT interrupt."]
112    #[inline(always)]
113    pub fn slv_wr_buf_done_int_set(&mut self) -> SLV_WR_BUF_DONE_INT_SET_W<DMA_INT_SET_SPEC> {
114        SLV_WR_BUF_DONE_INT_SET_W::new(self, 11)
115    }
116    #[doc = "Bit 12 - The software set bit for SPI_TRANS_DONE_INT interrupt."]
117    #[inline(always)]
118    pub fn trans_done_int_set(&mut self) -> TRANS_DONE_INT_SET_W<DMA_INT_SET_SPEC> {
119        TRANS_DONE_INT_SET_W::new(self, 12)
120    }
121    #[doc = "Bit 13 - The software set bit for SPI_DMA_SEG_TRANS_DONE_INT interrupt."]
122    #[inline(always)]
123    pub fn dma_seg_trans_done_int_set(&mut self) -> DMA_SEG_TRANS_DONE_INT_SET_W<DMA_INT_SET_SPEC> {
124        DMA_SEG_TRANS_DONE_INT_SET_W::new(self, 13)
125    }
126    #[doc = "Bit 14 - The software set bit for SPI_SEG_MAGIC_ERR_INT interrupt."]
127    #[inline(always)]
128    pub fn seg_magic_err_int_set(&mut self) -> SEG_MAGIC_ERR_INT_SET_W<DMA_INT_SET_SPEC> {
129        SEG_MAGIC_ERR_INT_SET_W::new(self, 14)
130    }
131    #[doc = "Bit 15 - The software set bit for SPI_SLV_BUF_ADDR_ERR_INT interrupt."]
132    #[inline(always)]
133    pub fn slv_buf_addr_err_int_set(&mut self) -> SLV_BUF_ADDR_ERR_INT_SET_W<DMA_INT_SET_SPEC> {
134        SLV_BUF_ADDR_ERR_INT_SET_W::new(self, 15)
135    }
136    #[doc = "Bit 16 - The software set bit for SPI_SLV_CMD_ERR_INT interrupt."]
137    #[inline(always)]
138    pub fn slv_cmd_err_int_set(&mut self) -> SLV_CMD_ERR_INT_SET_W<DMA_INT_SET_SPEC> {
139        SLV_CMD_ERR_INT_SET_W::new(self, 16)
140    }
141    #[doc = "Bit 17 - The software set bit for SPI_MST_RX_AFIFO_WFULL_ERR_INT interrupt."]
142    #[inline(always)]
143    pub fn mst_rx_afifo_wfull_err_int_set(
144        &mut self,
145    ) -> MST_RX_AFIFO_WFULL_ERR_INT_SET_W<DMA_INT_SET_SPEC> {
146        MST_RX_AFIFO_WFULL_ERR_INT_SET_W::new(self, 17)
147    }
148    #[doc = "Bit 18 - The software set bit for SPI_MST_TX_AFIFO_REMPTY_ERR_INT interrupt."]
149    #[inline(always)]
150    pub fn mst_tx_afifo_rempty_err_int_set(
151        &mut self,
152    ) -> MST_TX_AFIFO_REMPTY_ERR_INT_SET_W<DMA_INT_SET_SPEC> {
153        MST_TX_AFIFO_REMPTY_ERR_INT_SET_W::new(self, 18)
154    }
155    #[doc = "Bit 19 - The software set bit for SPI_APP2_INT interrupt."]
156    #[inline(always)]
157    pub fn app2_int_set(&mut self) -> APP2_INT_SET_W<DMA_INT_SET_SPEC> {
158        APP2_INT_SET_W::new(self, 19)
159    }
160    #[doc = "Bit 20 - The software set bit for SPI_APP1_INT interrupt."]
161    #[inline(always)]
162    pub fn app1_int_set(&mut self) -> APP1_INT_SET_W<DMA_INT_SET_SPEC> {
163        APP1_INT_SET_W::new(self, 20)
164    }
165}
166#[doc = "SPI interrupt software set register\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dma_int_set::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
167pub struct DMA_INT_SET_SPEC;
168impl crate::RegisterSpec for DMA_INT_SET_SPEC {
169    type Ux = u32;
170}
171#[doc = "`write(|w| ..)` method takes [`dma_int_set::W`](W) writer structure"]
172impl crate::Writable for DMA_INT_SET_SPEC {
173    type Safety = crate::Unsafe;
174    const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
175    const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
176}
177#[doc = "`reset()` method sets DMA_INT_SET to value 0"]
178impl crate::Resettable for DMA_INT_SET_SPEC {
179    const RESET_VALUE: u32 = 0;
180}
esp32h2/spi2/dma_int_set.rs

esp32h2/spi2/
dma_int_set.rs
