esp32h2/spi1/
misc.rs

1#[doc = "Register `MISC` reader"]
2pub type R = crate::R<MISC_SPEC>;
3#[doc = "Register `MISC` writer"]
4pub type W = crate::W<MISC_SPEC>;
5#[doc = "Field `CS0_DIS` reader - SPI_CS0 pin enable, 1: disable SPI_CS0, 0: SPI_CS0 pin is active to select SPI device, such as flash, external RAM and so on."]
6pub type CS0_DIS_R = crate::BitReader;
7#[doc = "Field `CS0_DIS` writer - SPI_CS0 pin enable, 1: disable SPI_CS0, 0: SPI_CS0 pin is active to select SPI device, such as flash, external RAM and so on."]
8pub type CS0_DIS_W<'a, REG> = crate::BitWriter<'a, REG>;
9#[doc = "Field `CS1_DIS` reader - SPI_CS1 pin enable, 1: disable SPI_CS1, 0: SPI_CS1 pin is active to select SPI device, such as flash, external RAM and so on."]
10pub type CS1_DIS_R = crate::BitReader;
11#[doc = "Field `CS1_DIS` writer - SPI_CS1 pin enable, 1: disable SPI_CS1, 0: SPI_CS1 pin is active to select SPI device, such as flash, external RAM and so on."]
12pub type CS1_DIS_W<'a, REG> = crate::BitWriter<'a, REG>;
13#[doc = "Field `CK_IDLE_EDGE` reader - 1: spi clk line is high when idle 0: spi clk line is low when idle"]
14pub type CK_IDLE_EDGE_R = crate::BitReader;
15#[doc = "Field `CK_IDLE_EDGE` writer - 1: spi clk line is high when idle 0: spi clk line is low when idle"]
16pub type CK_IDLE_EDGE_W<'a, REG> = crate::BitWriter<'a, REG>;
17#[doc = "Field `CS_KEEP_ACTIVE` reader - spi cs line keep low when the bit is set."]
18pub type CS_KEEP_ACTIVE_R = crate::BitReader;
19#[doc = "Field `CS_KEEP_ACTIVE` writer - spi cs line keep low when the bit is set."]
20pub type CS_KEEP_ACTIVE_W<'a, REG> = crate::BitWriter<'a, REG>;
21impl R {
22    #[doc = "Bit 0 - SPI_CS0 pin enable, 1: disable SPI_CS0, 0: SPI_CS0 pin is active to select SPI device, such as flash, external RAM and so on."]
23    #[inline(always)]
24    pub fn cs0_dis(&self) -> CS0_DIS_R {
25        CS0_DIS_R::new((self.bits & 1) != 0)
26    }
27    #[doc = "Bit 1 - SPI_CS1 pin enable, 1: disable SPI_CS1, 0: SPI_CS1 pin is active to select SPI device, such as flash, external RAM and so on."]
28    #[inline(always)]
29    pub fn cs1_dis(&self) -> CS1_DIS_R {
30        CS1_DIS_R::new(((self.bits >> 1) & 1) != 0)
31    }
32    #[doc = "Bit 9 - 1: spi clk line is high when idle 0: spi clk line is low when idle"]
33    #[inline(always)]
34    pub fn ck_idle_edge(&self) -> CK_IDLE_EDGE_R {
35        CK_IDLE_EDGE_R::new(((self.bits >> 9) & 1) != 0)
36    }
37    #[doc = "Bit 10 - spi cs line keep low when the bit is set."]
38    #[inline(always)]
39    pub fn cs_keep_active(&self) -> CS_KEEP_ACTIVE_R {
40        CS_KEEP_ACTIVE_R::new(((self.bits >> 10) & 1) != 0)
41    }
42}
43#[cfg(feature = "impl-register-debug")]
44impl core::fmt::Debug for R {
45    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
46        f.debug_struct("MISC")
47            .field("cs0_dis", &self.cs0_dis())
48            .field("cs1_dis", &self.cs1_dis())
49            .field("ck_idle_edge", &self.ck_idle_edge())
50            .field("cs_keep_active", &self.cs_keep_active())
51            .finish()
52    }
53}
54impl W {
55    #[doc = "Bit 0 - SPI_CS0 pin enable, 1: disable SPI_CS0, 0: SPI_CS0 pin is active to select SPI device, such as flash, external RAM and so on."]
56    #[inline(always)]
57    pub fn cs0_dis(&mut self) -> CS0_DIS_W<MISC_SPEC> {
58        CS0_DIS_W::new(self, 0)
59    }
60    #[doc = "Bit 1 - SPI_CS1 pin enable, 1: disable SPI_CS1, 0: SPI_CS1 pin is active to select SPI device, such as flash, external RAM and so on."]
61    #[inline(always)]
62    pub fn cs1_dis(&mut self) -> CS1_DIS_W<MISC_SPEC> {
63        CS1_DIS_W::new(self, 1)
64    }
65    #[doc = "Bit 9 - 1: spi clk line is high when idle 0: spi clk line is low when idle"]
66    #[inline(always)]
67    pub fn ck_idle_edge(&mut self) -> CK_IDLE_EDGE_W<MISC_SPEC> {
68        CK_IDLE_EDGE_W::new(self, 9)
69    }
70    #[doc = "Bit 10 - spi cs line keep low when the bit is set."]
71    #[inline(always)]
72    pub fn cs_keep_active(&mut self) -> CS_KEEP_ACTIVE_W<MISC_SPEC> {
73        CS_KEEP_ACTIVE_W::new(self, 10)
74    }
75}
76#[doc = "SPI1 misc register\n\nYou can [`read`](crate::Reg::read) this register and get [`misc::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`misc::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
77pub struct MISC_SPEC;
78impl crate::RegisterSpec for MISC_SPEC {
79    type Ux = u32;
80}
81#[doc = "`read()` method returns [`misc::R`](R) reader structure"]
82impl crate::Readable for MISC_SPEC {}
83#[doc = "`write(|w| ..)` method takes [`misc::W`](W) writer structure"]
84impl crate::Writable for MISC_SPEC {
85    type Safety = crate::Unsafe;
86    const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
87    const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
88}
89#[doc = "`reset()` method sets MISC to value 0x02"]
90impl crate::Resettable for MISC_SPEC {
91    const RESET_VALUE: u32 = 0x02;
92}
esp32h2/spi1/misc.rs

esp32h2/spi1/
misc.rs
