Type Alias R

pub type R = R<INT_RAW_SPEC>;

Register INT_RAW reader

Aliased Type

struct R { /* private fields */ }

Implementations

impl R

pub fn timer0_stop(&self) -> TIMER0_STOP_R

Bit 0 - The raw status bit for the interrupt triggered when the timer 0 stops.

pub fn timer1_stop(&self) -> TIMER1_STOP_R

Bit 1 - The raw status bit for the interrupt triggered when the timer 1 stops.

pub fn timer2_stop(&self) -> TIMER2_STOP_R

Bit 2 - The raw status bit for the interrupt triggered when the timer 2 stops.

pub fn timer0_tez(&self) -> TIMER0_TEZ_R

Bit 3 - The raw status bit for the interrupt triggered by a PWM timer 0 TEZ event.

pub fn timer1_tez(&self) -> TIMER1_TEZ_R

Bit 4 - The raw status bit for the interrupt triggered by a PWM timer 1 TEZ event.

pub fn timer2_tez(&self) -> TIMER2_TEZ_R

Bit 5 - The raw status bit for the interrupt triggered by a PWM timer 2 TEZ event.

pub fn timer0_tep(&self) -> TIMER0_TEP_R

Bit 6 - The raw status bit for the interrupt triggered by a PWM timer 0 TEP event.

pub fn timer1_tep(&self) -> TIMER1_TEP_R

Bit 7 - The raw status bit for the interrupt triggered by a PWM timer 1 TEP event.

pub fn timer2_tep(&self) -> TIMER2_TEP_R

Bit 8 - The raw status bit for the interrupt triggered by a PWM timer 2 TEP event.

pub fn fault0(&self) -> FAULT0_R

Bit 9 - The raw status bit for the interrupt triggered when event_f0 starts.

pub fn fault1(&self) -> FAULT1_R

Bit 10 - The raw status bit for the interrupt triggered when event_f1 starts.

pub fn fault2(&self) -> FAULT2_R

Bit 11 - The raw status bit for the interrupt triggered when event_f2 starts.

pub fn fault0_clr(&self) -> FAULT0_CLR_R

Bit 12 - The raw status bit for the interrupt triggered when event_f0 ends.

pub fn fault1_clr(&self) -> FAULT1_CLR_R

Bit 13 - The raw status bit for the interrupt triggered when event_f1 ends.

pub fn fault2_clr(&self) -> FAULT2_CLR_R

Bit 14 - The raw status bit for the interrupt triggered when event_f2 ends.

pub fn cmpr0_tea(&self) -> CMPR0_TEA_R

Bit 15 - The raw status bit for the interrupt triggered by a PWM operator 0 TEA event

pub fn cmpr1_tea(&self) -> CMPR1_TEA_R

Bit 16 - The raw status bit for the interrupt triggered by a PWM operator 1 TEA event

pub fn cmpr2_tea(&self) -> CMPR2_TEA_R

Bit 17 - The raw status bit for the interrupt triggered by a PWM operator 2 TEA event

pub fn cmpr0_teb(&self) -> CMPR0_TEB_R

Bit 18 - The raw status bit for the interrupt triggered by a PWM operator 0 TEB event

pub fn cmpr1_teb(&self) -> CMPR1_TEB_R

Bit 19 - The raw status bit for the interrupt triggered by a PWM operator 1 TEB event

pub fn cmpr2_teb(&self) -> CMPR2_TEB_R

Bit 20 - The raw status bit for the interrupt triggered by a PWM operator 2 TEB event

pub fn tz0_cbc(&self) -> TZ0_CBC_R

Bit 21 - The raw status bit for the interrupt triggered by a cycle-by-cycle mode action on PWM0.

pub fn tz1_cbc(&self) -> TZ1_CBC_R

Bit 22 - The raw status bit for the interrupt triggered by a cycle-by-cycle mode action on PWM1.

pub fn tz2_cbc(&self) -> TZ2_CBC_R

Bit 23 - The raw status bit for the interrupt triggered by a cycle-by-cycle mode action on PWM2.

pub fn tz0_ost(&self) -> TZ0_OST_R

Bit 24 - The raw status bit for the interrupt triggered by a one-shot mode action on PWM0.

pub fn tz1_ost(&self) -> TZ1_OST_R

Bit 25 - The raw status bit for the interrupt triggered by a one-shot mode action on PWM1.

pub fn tz2_ost(&self) -> TZ2_OST_R

Bit 26 - The raw status bit for the interrupt triggered by a one-shot mode action on PWM2.

pub fn cap0(&self) -> CAP0_R

Bit 27 - The raw status bit for the interrupt triggered by capture on channel 0.

pub fn cap1(&self) -> CAP1_R

Bit 28 - The raw status bit for the interrupt triggered by capture on channel 1.

pub fn cap2(&self) -> CAP2_R

Bit 29 - The raw status bit for the interrupt triggered by capture on channel 2.