esp32c6/mem_monitor/
log_mem_addr_update.rs1#[doc = "Register `LOG_MEM_ADDR_UPDATE` writer"]
2pub type W = crate::W<LOG_MEM_ADDR_UPDATE_SPEC>;
3#[doc = "Field `LOG_MEM_ADDR_UPDATE` writer - Set 1 to updata MEM_MONITOR_LOG_MEM_CURRENT_ADDR, when set 1, MEM_MONITOR_LOG_MEM_CURRENT_ADDR will update to MEM_MONITOR_LOG_MEM_START"]
4pub type LOG_MEM_ADDR_UPDATE_W<'a, REG> = crate::BitWriter<'a, REG>;
5#[cfg(feature = "impl-register-debug")]
6impl core::fmt::Debug for crate::generic::Reg<LOG_MEM_ADDR_UPDATE_SPEC> {
7 fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result {
8 write!(f, "(not readable)")
9 }
10}
11impl W {
12 #[doc = "Bit 0 - Set 1 to updata MEM_MONITOR_LOG_MEM_CURRENT_ADDR, when set 1, MEM_MONITOR_LOG_MEM_CURRENT_ADDR will update to MEM_MONITOR_LOG_MEM_START"]
13 #[inline(always)]
14 pub fn log_mem_addr_update(&mut self) -> LOG_MEM_ADDR_UPDATE_W<LOG_MEM_ADDR_UPDATE_SPEC> {
15 LOG_MEM_ADDR_UPDATE_W::new(self, 0)
16 }
17}
18#[doc = "writing address update\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`log_mem_addr_update::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
19pub struct LOG_MEM_ADDR_UPDATE_SPEC;
20impl crate::RegisterSpec for LOG_MEM_ADDR_UPDATE_SPEC {
21 type Ux = u32;
22}
23#[doc = "`write(|w| ..)` method takes [`log_mem_addr_update::W`](W) writer structure"]
24impl crate::Writable for LOG_MEM_ADDR_UPDATE_SPEC {
25 type Safety = crate::Unsafe;
26 const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
27 const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
28}
29#[doc = "`reset()` method sets LOG_MEM_ADDR_UPDATE to value 0"]
30impl crate::Resettable for LOG_MEM_ADDR_UPDATE_SPEC {
31 const RESET_VALUE: u32 = 0;
32}