esp32c6/apb_saradc/
int_st.rs

1#[doc = "Register `INT_ST` reader"]
2pub type R = crate::R<INT_ST_SPEC>;
3#[doc = "Field `TSENS` reader - saradc tsens interrupt state"]
4pub type TSENS_R = crate::BitReader;
5#[doc = "Field `THRES1_LOW` reader - saradc thres1 low interrupt state"]
6pub type THRES1_LOW_R = crate::BitReader;
7#[doc = "Field `THRES0_LOW` reader - saradc thres0 low interrupt state"]
8pub type THRES0_LOW_R = crate::BitReader;
9#[doc = "Field `THRES1_HIGH` reader - saradc thres1 high interrupt state"]
10pub type THRES1_HIGH_R = crate::BitReader;
11#[doc = "Field `THRES0_HIGH` reader - saradc thres0 high interrupt state"]
12pub type THRES0_HIGH_R = crate::BitReader;
13#[doc = "Field `ADC2_DONE` reader - saradc2 done interrupt state"]
14pub type ADC2_DONE_R = crate::BitReader;
15#[doc = "Field `ADC1_DONE` reader - saradc1 done interrupt state"]
16pub type ADC1_DONE_R = crate::BitReader;
17impl R {
18    #[doc = "Bit 25 - saradc tsens interrupt state"]
19    #[inline(always)]
20    pub fn tsens(&self) -> TSENS_R {
21        TSENS_R::new(((self.bits >> 25) & 1) != 0)
22    }
23    #[doc = "Bit 26 - saradc thres1 low interrupt state"]
24    #[inline(always)]
25    pub fn thres1_low(&self) -> THRES1_LOW_R {
26        THRES1_LOW_R::new(((self.bits >> 26) & 1) != 0)
27    }
28    #[doc = "Bit 27 - saradc thres0 low interrupt state"]
29    #[inline(always)]
30    pub fn thres0_low(&self) -> THRES0_LOW_R {
31        THRES0_LOW_R::new(((self.bits >> 27) & 1) != 0)
32    }
33    #[doc = "Bit 28 - saradc thres1 high interrupt state"]
34    #[inline(always)]
35    pub fn thres1_high(&self) -> THRES1_HIGH_R {
36        THRES1_HIGH_R::new(((self.bits >> 28) & 1) != 0)
37    }
38    #[doc = "Bit 29 - saradc thres0 high interrupt state"]
39    #[inline(always)]
40    pub fn thres0_high(&self) -> THRES0_HIGH_R {
41        THRES0_HIGH_R::new(((self.bits >> 29) & 1) != 0)
42    }
43    #[doc = "Bit 30 - saradc2 done interrupt state"]
44    #[inline(always)]
45    pub fn adc2_done(&self) -> ADC2_DONE_R {
46        ADC2_DONE_R::new(((self.bits >> 30) & 1) != 0)
47    }
48    #[doc = "Bit 31 - saradc1 done interrupt state"]
49    #[inline(always)]
50    pub fn adc1_done(&self) -> ADC1_DONE_R {
51        ADC1_DONE_R::new(((self.bits >> 31) & 1) != 0)
52    }
53}
54#[cfg(feature = "impl-register-debug")]
55impl core::fmt::Debug for R {
56    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
57        f.debug_struct("INT_ST")
58            .field("tsens", &self.tsens())
59            .field("thres1_low", &self.thres1_low())
60            .field("thres0_low", &self.thres0_low())
61            .field("thres1_high", &self.thres1_high())
62            .field("thres0_high", &self.thres0_high())
63            .field("adc2_done", &self.adc2_done())
64            .field("adc1_done", &self.adc1_done())
65            .finish()
66    }
67}
68#[doc = "digital saradc int register\n\nYou can [`read`](crate::Reg::read) this register and get [`int_st::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
69pub struct INT_ST_SPEC;
70impl crate::RegisterSpec for INT_ST_SPEC {
71    type Ux = u32;
72}
73#[doc = "`read()` method returns [`int_st::R`](R) reader structure"]
74impl crate::Readable for INT_ST_SPEC {}
75#[doc = "`reset()` method sets INT_ST to value 0"]
76impl crate::Resettable for INT_ST_SPEC {
77    const RESET_VALUE: u32 = 0;
78}
esp32c6/apb_saradc/int_st.rs

esp32c6/apb_saradc/
int_st.rs
