Module esp32c6::lp_i2c0

Low-power I2C (Inter-Integrated Circuit) Controller 0

Modules

• clk_conf
  I2C CLK configuration register
• comd
  I2C command register %s
• ctr
  Transmission setting
• data
  Rx FIFO read data.
• date
  Version register
• fifo_conf
  FIFO configuration register.
• fifo_st
  FIFO status register.
• filter_cfg
  SCL and SDA filter configuration register
• int_clr
  Interrupt clear bits
• int_ena
  Interrupt enable bits
• int_raw
  Raw interrupt status
• int_st
  Status of captured I2C communication events
• rxfifo_start_addr
  I2C RXFIFO base address register
• scl_high_period
  Configures the high level width of SCL
• scl_low_period
  Configures the low level width of the SCL Clock
• scl_main_st_time_out
  SCL main status time out register
• scl_rstart_setup
  Configures the delay between the positive edge of SCL and the negative edge of SDA
• scl_sp_conf
  Power configuration register
• scl_st_time_out
  SCL status time out register
• scl_start_hold
  Configures the delay between the SDA and SCL negative edge for a start condition
• scl_stop_hold
  Configures the delay after the SCL clock edge for a stop condition
• scl_stop_setup
  Configures the delay between the SDA and SCL positive edge for a stop condition
• sda_hold
  Configures the hold time after a negative SCL edge.
• sda_sample
  Configures the sample time after a positive SCL edge.
• sr
  Describe I2C work status.
• to
  Setting time out control for receiving data.
• txfifo_start_addr
  I2C TXFIFO base address register

Structs

• RegisterBlock
  Register block

Type Aliases

• CLK_CONF
  CLK_CONF (rw) register accessor: I2C CLK configuration register
• COMD
  COMD (rw) register accessor: I2C command register %s
• CTR
  CTR (rw) register accessor: Transmission setting
• DATA
  DATA (rw) register accessor: Rx FIFO read data.
• DATE
  DATE (rw) register accessor: Version register
• FIFO_CONF
  FIFO_CONF (rw) register accessor: FIFO configuration register.
• FIFO_ST
  FIFO_ST (r) register accessor: FIFO status register.
• FILTER_CFG
  FILTER_CFG (rw) register accessor: SCL and SDA filter configuration register
• INT_CLR
  INT_CLR (w) register accessor: Interrupt clear bits
• INT_ENA
  INT_ENA (rw) register accessor: Interrupt enable bits
• INT_RAW
  INT_RAW (r) register accessor: Raw interrupt status
• INT_ST
  INT_ST (r) register accessor: Status of captured I2C communication events
• RXFIFO_START_ADDR
  RXFIFO_START_ADDR (r) register accessor: I2C RXFIFO base address register
• SCL_HIGH_PERIOD
  SCL_HIGH_PERIOD (rw) register accessor: Configures the high level width of SCL
• SCL_LOW_PERIOD
  SCL_LOW_PERIOD (rw) register accessor: Configures the low level width of the SCL Clock
• SCL_MAIN_ST_TIME_OUT
  SCL_MAIN_ST_TIME_OUT (rw) register accessor: SCL main status time out register
• SCL_RSTART_SETUP
  SCL_RSTART_SETUP (rw) register accessor: Configures the delay between the positive edge of SCL and the negative edge of SDA
• SCL_SP_CONF
  SCL_SP_CONF (rw) register accessor: Power configuration register
• SCL_START_HOLD
  SCL_START_HOLD (rw) register accessor: Configures the delay between the SDA and SCL negative edge for a start condition
• SCL_STOP_HOLD
  SCL_STOP_HOLD (rw) register accessor: Configures the delay after the SCL clock edge for a stop condition
• SCL_STOP_SETUP
  SCL_STOP_SETUP (rw) register accessor: Configures the delay between the SDA and SCL positive edge for a stop condition
• SCL_ST_TIME_OUT
  SCL_ST_TIME_OUT (rw) register accessor: SCL status time out register
• SDA_HOLD
  SDA_HOLD (rw) register accessor: Configures the hold time after a negative SCL edge.
• SDA_SAMPLE
  SDA_SAMPLE (rw) register accessor: Configures the sample time after a positive SCL edge.
• SR
  SR (r) register accessor: Describe I2C work status.
• TO
  TO (rw) register accessor: Setting time out control for receiving data.
• TXFIFO_START_ADDR
  TXFIFO_START_ADDR (r) register accessor: I2C TXFIFO base address register