Struct esp32c6::LEDC

pub struct LEDC { /* private fields */ }

LED Control PWM (Pulse Width Modulation)

Implementations

impl LEDC

pub const PTR: *const RegisterBlock = {0x60007000 as *const ledc::RegisterBlock}

Pointer to the register block

pub const fn ptr() -> *const RegisterBlock

Return the pointer to the register block

pub unsafe fn steal() -> Self

Steal an instance of this peripheral

Safety

Ensure that the new instance of the peripheral cannot be used in a way that may race with any existing instances, for example by only accessing read-only or write-only registers, or by consuming the original peripheral and using critical sections to coordinate access between multiple new instances.

Additionally, other software such as HALs may rely on only one peripheral instance existing to ensure memory safety; ensure no stolen instances are passed to such software.

Methods from Deref<Target = RegisterBlock>

pub fn ch_conf0(&self, n: usize) -> &CH_CONF0

0x00..0x18 - Configuration register 0 for channel %s

pub fn ch_conf0_iter(&self) -> impl Iterator<Item = &CH_CONF0>

Iterator for array of: 0x00..0x18 - Configuration register 0 for channel %s

pub fn ch0_conf0(&self) -> &CH_CONF0

0x00 - Configuration register 0 for channel 0

pub fn ch1_conf0(&self) -> &CH_CONF0

0x14 - Configuration register 0 for channel 1

pub fn ch2_conf0(&self) -> &CH_CONF0

0x28 - Configuration register 0 for channel 2

pub fn ch3_conf0(&self) -> &CH_CONF0

0x3c - Configuration register 0 for channel 3

pub fn ch4_conf0(&self) -> &CH_CONF0

0x50 - Configuration register 0 for channel 4

pub fn ch5_conf0(&self) -> &CH_CONF0

0x64 - Configuration register 0 for channel 5

pub fn ch_hpoint(&self, n: usize) -> &CH_HPOINT

0x04..0x1c - High point register for channel %s

pub fn ch_hpoint_iter(&self) -> impl Iterator<Item = &CH_HPOINT>

Iterator for array of: 0x04..0x1c - High point register for channel %s

pub fn ch0_hpoint(&self) -> &CH_HPOINT

0x04 - High point register for channel 0

pub fn ch1_hpoint(&self) -> &CH_HPOINT

0x18 - High point register for channel 1

pub fn ch2_hpoint(&self) -> &CH_HPOINT

0x2c - High point register for channel 2

pub fn ch3_hpoint(&self) -> &CH_HPOINT

0x40 - High point register for channel 3

pub fn ch4_hpoint(&self) -> &CH_HPOINT

0x54 - High point register for channel 4

pub fn ch5_hpoint(&self) -> &CH_HPOINT

0x68 - High point register for channel 5

pub fn ch_duty(&self, n: usize) -> &CH_DUTY

0x08..0x20 - Initial duty cycle for channel %s

pub fn ch_duty_iter(&self) -> impl Iterator<Item = &CH_DUTY>

Iterator for array of: 0x08..0x20 - Initial duty cycle for channel %s

pub fn ch0_duty(&self) -> &CH_DUTY

0x08 - Initial duty cycle for channel 0

pub fn ch1_duty(&self) -> &CH_DUTY

0x1c - Initial duty cycle for channel 1

pub fn ch2_duty(&self) -> &CH_DUTY

0x30 - Initial duty cycle for channel 2

pub fn ch3_duty(&self) -> &CH_DUTY

0x44 - Initial duty cycle for channel 3

pub fn ch4_duty(&self) -> &CH_DUTY

0x58 - Initial duty cycle for channel 4

pub fn ch5_duty(&self) -> &CH_DUTY

0x6c - Initial duty cycle for channel 5

pub fn ch_conf1(&self, n: usize) -> &CH_CONF1

0x0c..0x24 - Configuration register 1 for channel %s

pub fn ch_conf1_iter(&self) -> impl Iterator<Item = &CH_CONF1>

Iterator for array of: 0x0c..0x24 - Configuration register 1 for channel %s

pub fn ch0_conf1(&self) -> &CH_CONF1

0x0c - Configuration register 1 for channel 0

pub fn ch1_conf1(&self) -> &CH_CONF1

0x20 - Configuration register 1 for channel 1

pub fn ch2_conf1(&self) -> &CH_CONF1

0x34 - Configuration register 1 for channel 2

pub fn ch3_conf1(&self) -> &CH_CONF1

0x48 - Configuration register 1 for channel 3

pub fn ch4_conf1(&self) -> &CH_CONF1

0x5c - Configuration register 1 for channel 4

pub fn ch5_conf1(&self) -> &CH_CONF1

0x70 - Configuration register 1 for channel 5

pub fn ch_duty_r(&self, n: usize) -> &CH_DUTY_R

0x10..0x28 - Current duty cycle for channel %s

pub fn ch_duty_r_iter(&self) -> impl Iterator<Item = &CH_DUTY_R>

Iterator for array of: 0x10..0x28 - Current duty cycle for channel %s

pub fn ch0_duty_r(&self) -> &CH_DUTY_R

0x10 - Current duty cycle for channel 0

pub fn ch1_duty_r(&self) -> &CH_DUTY_R

0x24 - Current duty cycle for channel 1

pub fn ch2_duty_r(&self) -> &CH_DUTY_R

0x38 - Current duty cycle for channel 2

pub fn ch3_duty_r(&self) -> &CH_DUTY_R

0x4c - Current duty cycle for channel 3

pub fn ch4_duty_r(&self) -> &CH_DUTY_R

0x60 - Current duty cycle for channel 4

pub fn ch5_duty_r(&self) -> &CH_DUTY_R

0x74 - Current duty cycle for channel 5

pub fn timer_conf(&self, n: usize) -> &TIMER_CONF

0xa0..0xb0 - Timer %s configuration

pub fn timer_conf_iter(&self) -> impl Iterator<Item = &TIMER_CONF>

Iterator for array of: 0xa0..0xb0 - Timer %s configuration

pub fn timer0_conf(&self) -> &TIMER_CONF

0xa0 - Timer 0 configuration

pub fn timer1_conf(&self) -> &TIMER_CONF

0xa8 - Timer 1 configuration

pub fn timer2_conf(&self) -> &TIMER_CONF

0xb0 - Timer 2 configuration

pub fn timer3_conf(&self) -> &TIMER_CONF

0xb8 - Timer 3 configuration

pub fn timer_value(&self, n: usize) -> &TIMER_VALUE

0xa4..0xb4 - Timer %s current counter value

pub fn timer_value_iter(&self) -> impl Iterator<Item = &TIMER_VALUE>

Iterator for array of: 0xa4..0xb4 - Timer %s current counter value

pub fn timer0_value(&self) -> &TIMER_VALUE

0xa4 - Timer 0 current counter value

pub fn timer1_value(&self) -> &TIMER_VALUE

0xac - Timer 1 current counter value

pub fn timer2_value(&self) -> &TIMER_VALUE

0xb4 - Timer 2 current counter value

pub fn timer3_value(&self) -> &TIMER_VALUE

0xbc - Timer 3 current counter value

pub fn int_raw(&self) -> &INT_RAW

0xc0 - Raw interrupt status

pub fn int_st(&self) -> &INT_ST

0xc4 - Masked interrupt status

pub fn int_ena(&self) -> &INT_ENA

0xc8 - Interrupt enable bits

pub fn int_clr(&self) -> &INT_CLR

0xcc - Interrupt clear bits

pub fn ch_gamma_wr(&self, n: usize) -> &CH_GAMMA_WR

0x100..0x118 - Ledc ch%s gamma ram write register.

pub fn ch_gamma_wr_iter(&self) -> impl Iterator<Item = &CH_GAMMA_WR>

Iterator for array of: 0x100..0x118 - Ledc ch%s gamma ram write register.

pub fn ch0_gamma_wr(&self) -> &CH_GAMMA_WR

0x100 - Ledc ch0 gamma ram write register.

pub fn ch1_gamma_wr(&self) -> &CH_GAMMA_WR

0x110 - Ledc ch1 gamma ram write register.

pub fn ch2_gamma_wr(&self) -> &CH_GAMMA_WR

0x120 - Ledc ch2 gamma ram write register.

pub fn ch3_gamma_wr(&self) -> &CH_GAMMA_WR

0x130 - Ledc ch3 gamma ram write register.

pub fn ch4_gamma_wr(&self) -> &CH_GAMMA_WR

0x140 - Ledc ch4 gamma ram write register.

pub fn ch5_gamma_wr(&self) -> &CH_GAMMA_WR

0x150 - Ledc ch5 gamma ram write register.

pub fn ch_gamma_wr_addr(&self, n: usize) -> &CH_GAMMA_WR_ADDR

0x104..0x11c - Ledc ch%s gamma ram write address register.

pub fn ch_gamma_wr_addr_iter(&self) -> impl Iterator<Item = &CH_GAMMA_WR_ADDR>

Iterator for array of: 0x104..0x11c - Ledc ch%s gamma ram write address register.

pub fn ch0_gamma_wr_addr(&self) -> &CH_GAMMA_WR_ADDR

0x104 - Ledc ch0 gamma ram write address register.

pub fn ch1_gamma_wr_addr(&self) -> &CH_GAMMA_WR_ADDR

0x114 - Ledc ch1 gamma ram write address register.

pub fn ch2_gamma_wr_addr(&self) -> &CH_GAMMA_WR_ADDR

0x124 - Ledc ch2 gamma ram write address register.

pub fn ch3_gamma_wr_addr(&self) -> &CH_GAMMA_WR_ADDR

0x134 - Ledc ch3 gamma ram write address register.

pub fn ch4_gamma_wr_addr(&self) -> &CH_GAMMA_WR_ADDR

0x144 - Ledc ch4 gamma ram write address register.

pub fn ch5_gamma_wr_addr(&self) -> &CH_GAMMA_WR_ADDR

0x154 - Ledc ch5 gamma ram write address register.

pub fn ch_gamma_rd_addr(&self, n: usize) -> &CH_GAMMA_RD_ADDR

0x108..0x120 - Ledc ch%s gamma ram read address register.

pub fn ch_gamma_rd_addr_iter(&self) -> impl Iterator<Item = &CH_GAMMA_RD_ADDR>

Iterator for array of: 0x108..0x120 - Ledc ch%s gamma ram read address register.

pub fn ch0_gamma_rd_addr(&self) -> &CH_GAMMA_RD_ADDR

0x108 - Ledc ch0 gamma ram read address register.

pub fn ch1_gamma_rd_addr(&self) -> &CH_GAMMA_RD_ADDR

0x118 - Ledc ch1 gamma ram read address register.

pub fn ch2_gamma_rd_addr(&self) -> &CH_GAMMA_RD_ADDR

0x128 - Ledc ch2 gamma ram read address register.

pub fn ch3_gamma_rd_addr(&self) -> &CH_GAMMA_RD_ADDR

0x138 - Ledc ch3 gamma ram read address register.

pub fn ch4_gamma_rd_addr(&self) -> &CH_GAMMA_RD_ADDR

0x148 - Ledc ch4 gamma ram read address register.

pub fn ch5_gamma_rd_addr(&self) -> &CH_GAMMA_RD_ADDR

0x158 - Ledc ch5 gamma ram read address register.

pub fn ch_gamma_rd_data(&self, n: usize) -> &CH_GAMMA_RD_DATA

0x10c..0x124 - Ledc ch%s gamma ram read data register.

pub fn ch_gamma_rd_data_iter(&self) -> impl Iterator<Item = &CH_GAMMA_RD_DATA>

Iterator for array of: 0x10c..0x124 - Ledc ch%s gamma ram read data register.

pub fn ch0_gamma_rd_data(&self) -> &CH_GAMMA_RD_DATA

0x10c - Ledc ch0 gamma ram read data register.

pub fn ch1_gamma_rd_data(&self) -> &CH_GAMMA_RD_DATA

0x11c - Ledc ch1 gamma ram read data register.

pub fn ch2_gamma_rd_data(&self) -> &CH_GAMMA_RD_DATA

0x12c - Ledc ch2 gamma ram read data register.

pub fn ch3_gamma_rd_data(&self) -> &CH_GAMMA_RD_DATA

0x13c - Ledc ch3 gamma ram read data register.

pub fn ch4_gamma_rd_data(&self) -> &CH_GAMMA_RD_DATA

0x14c - Ledc ch4 gamma ram read data register.

pub fn ch5_gamma_rd_data(&self) -> &CH_GAMMA_RD_DATA

0x15c - Ledc ch5 gamma ram read data register.

pub fn ch_gamma_conf(&self, n: usize) -> &CH_GAMMA_CONF

0x180..0x198 - Ledc ch%s gamma config register.

pub fn ch_gamma_conf_iter(&self) -> impl Iterator<Item = &CH_GAMMA_CONF>

Iterator for array of: 0x180..0x198 - Ledc ch%s gamma config register.

pub fn ch0_gamma_conf(&self) -> &CH_GAMMA_CONF

0x180 - Ledc ch0 gamma config register.

pub fn ch1_gamma_conf(&self) -> &CH_GAMMA_CONF

0x184 - Ledc ch1 gamma config register.

pub fn ch2_gamma_conf(&self) -> &CH_GAMMA_CONF

0x188 - Ledc ch2 gamma config register.

pub fn ch3_gamma_conf(&self) -> &CH_GAMMA_CONF

0x18c - Ledc ch3 gamma config register.

pub fn ch4_gamma_conf(&self) -> &CH_GAMMA_CONF

0x190 - Ledc ch4 gamma config register.

pub fn ch5_gamma_conf(&self) -> &CH_GAMMA_CONF

0x194 - Ledc ch5 gamma config register.

pub fn evt_task_en0(&self) -> &EVT_TASK_EN0

0x1a0 - Ledc event task enable bit register0.

pub fn evt_task_en1(&self) -> &EVT_TASK_EN1

0x1a4 - Ledc event task enable bit register1.

pub fn evt_task_en2(&self) -> &EVT_TASK_EN2

0x1a8 - Ledc event task enable bit register2.

pub fn timer_cmp(&self, n: usize) -> &TIMER_CMP

0x1b0..0x1c0 - Ledc timer%s compare value register.

pub fn timer_cmp_iter(&self) -> impl Iterator<Item = &TIMER_CMP>

Iterator for array of: 0x1b0..0x1c0 - Ledc timer%s compare value register.

pub fn timer0_cmp(&self) -> &TIMER_CMP

0x1b0 - Ledc timer0 compare value register.

pub fn timer1_cmp(&self) -> &TIMER_CMP

0x1b4 - Ledc timer1 compare value register.

pub fn timer2_cmp(&self) -> &TIMER_CMP

0x1b8 - Ledc timer2 compare value register.

pub fn timer3_cmp(&self) -> &TIMER_CMP

0x1bc - Ledc timer3 compare value register.

pub fn timer_cnt_cap(&self, n: usize) -> &TIMER_CNT_CAP

0x1c0..0x1d0 - Ledc timer%s count value capture register.

pub fn timer_cnt_cap_iter(&self) -> impl Iterator<Item = &TIMER_CNT_CAP>

Iterator for array of: 0x1c0..0x1d0 - Ledc timer%s count value capture register.

pub fn timer0_cnt_cap(&self) -> &TIMER_CNT_CAP

0x1c0 - Ledc timer0 count value capture register.

pub fn timer1_cnt_cap(&self) -> &TIMER_CNT_CAP

0x1c4 - Ledc timer1 count value capture register.

pub fn timer2_cnt_cap(&self) -> &TIMER_CNT_CAP

0x1c8 - Ledc timer2 count value capture register.

pub fn timer3_cnt_cap(&self) -> &TIMER_CNT_CAP

0x1cc - Ledc timer3 count value capture register.

pub fn conf(&self) -> &CONF

0x1f0 - Global ledc configuration register

pub fn date(&self) -> &DATE

0x1fc - Version control register

Trait Implementations

impl Debug for LEDC

fn fmt(&self, f: &mut Formatter<'_>) -> Result

Formats the value using the given formatter.

impl Deref for LEDC

type Target = RegisterBlock

The resulting type after dereferencing.

fn deref(&self) -> &Self::Target

Dereferences the value.

impl Send for LEDC