esp32c5 0.2.1

Peripheral access crate for the ESP32-C5
Documentation 
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#[doc = "Register `CONF` reader"]
pub type R = crate::R<CONF_SPEC>;
#[doc = "Register `CONF` writer"]
pub type W = crate::W<CONF_SPEC>;
#[doc = "Field `WORK_MODE` reader - The work mode bits of ECDSA Accelerator. 0: Signature Verify Mode. 1: Signature Generate Mode. 2: Export Public Key Mode. 3: invalid."]
pub type WORK_MODE_R = crate::FieldReader;
#[doc = "Field `WORK_MODE` writer - The work mode bits of ECDSA Accelerator. 0: Signature Verify Mode. 1: Signature Generate Mode. 2: Export Public Key Mode. 3: invalid."]
pub type WORK_MODE_W<'a, REG> = crate::FieldWriter<'a, REG, 2>;
#[doc = "Field `ECC_CURVE` reader - The ecc curve select bit of ECDSA Accelerator. 0: P-192. 1: P-256."]
pub type ECC_CURVE_R = crate::BitReader;
#[doc = "Field `ECC_CURVE` writer - The ecc curve select bit of ECDSA Accelerator. 0: P-192. 1: P-256."]
pub type ECC_CURVE_W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `SOFTWARE_SET_K` reader - The source of k select bit. 0: k is automatically generated by hardware. 1: k is written by software."]
pub type SOFTWARE_SET_K_R = crate::BitReader;
#[doc = "Field `SOFTWARE_SET_K` writer - The source of k select bit. 0: k is automatically generated by hardware. 1: k is written by software."]
pub type SOFTWARE_SET_K_W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `SOFTWARE_SET_Z` reader - The source of z select bit. 0: z is generated from SHA result. 1: z is written by software."]
pub type SOFTWARE_SET_Z_R = crate::BitReader;
#[doc = "Field `SOFTWARE_SET_Z` writer - The source of z select bit. 0: z is generated from SHA result. 1: z is written by software."]
pub type SOFTWARE_SET_Z_W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `DETERMINISTIC_K` reader - The source of hardware generated k. 0: k is generated by TRNG. 1: k is generated by deterministic derivation algorithm."]
pub type DETERMINISTIC_K_R = crate::BitReader;
#[doc = "Field `DETERMINISTIC_K` writer - The source of hardware generated k. 0: k is generated by TRNG. 1: k is generated by deterministic derivation algorithm."]
pub type DETERMINISTIC_K_W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `DETERMINISTIC_LOOP` reader - The (loop number - 1) value in the deterministic derivation algorithm to derive k."]
pub type DETERMINISTIC_LOOP_R = crate::FieldReader<u16>;
#[doc = "Field `DETERMINISTIC_LOOP` writer - The (loop number - 1) value in the deterministic derivation algorithm to derive k."]
pub type DETERMINISTIC_LOOP_W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>;
impl R {
    #[doc = "Bits 0:1 - The work mode bits of ECDSA Accelerator. 0: Signature Verify Mode. 1: Signature Generate Mode. 2: Export Public Key Mode. 3: invalid."]
    #[inline(always)]
    pub fn work_mode(&self) -> WORK_MODE_R {
        WORK_MODE_R::new((self.bits & 3) as u8)
    }
    #[doc = "Bit 2 - The ecc curve select bit of ECDSA Accelerator. 0: P-192. 1: P-256."]
    #[inline(always)]
    pub fn ecc_curve(&self) -> ECC_CURVE_R {
        ECC_CURVE_R::new(((self.bits >> 2) & 1) != 0)
    }
    #[doc = "Bit 3 - The source of k select bit. 0: k is automatically generated by hardware. 1: k is written by software."]
    #[inline(always)]
    pub fn software_set_k(&self) -> SOFTWARE_SET_K_R {
        SOFTWARE_SET_K_R::new(((self.bits >> 3) & 1) != 0)
    }
    #[doc = "Bit 4 - The source of z select bit. 0: z is generated from SHA result. 1: z is written by software."]
    #[inline(always)]
    pub fn software_set_z(&self) -> SOFTWARE_SET_Z_R {
        SOFTWARE_SET_Z_R::new(((self.bits >> 4) & 1) != 0)
    }
    #[doc = "Bit 5 - The source of hardware generated k. 0: k is generated by TRNG. 1: k is generated by deterministic derivation algorithm."]
    #[inline(always)]
    pub fn deterministic_k(&self) -> DETERMINISTIC_K_R {
        DETERMINISTIC_K_R::new(((self.bits >> 5) & 1) != 0)
    }
    #[doc = "Bits 6:21 - The (loop number - 1) value in the deterministic derivation algorithm to derive k."]
    #[inline(always)]
    pub fn deterministic_loop(&self) -> DETERMINISTIC_LOOP_R {
        DETERMINISTIC_LOOP_R::new(((self.bits >> 6) & 0xffff) as u16)
    }
}
#[cfg(feature = "impl-register-debug")]
impl core::fmt::Debug for R {
    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
        f.debug_struct("CONF")
            .field("work_mode", &self.work_mode())
            .field("ecc_curve", &self.ecc_curve())
            .field("software_set_k", &self.software_set_k())
            .field("software_set_z", &self.software_set_z())
            .field("deterministic_k", &self.deterministic_k())
            .field("deterministic_loop", &self.deterministic_loop())
            .finish()
    }
}
impl W {
    #[doc = "Bits 0:1 - The work mode bits of ECDSA Accelerator. 0: Signature Verify Mode. 1: Signature Generate Mode. 2: Export Public Key Mode. 3: invalid."]
    #[inline(always)]
    pub fn work_mode(&mut self) -> WORK_MODE_W<'_, CONF_SPEC> {
        WORK_MODE_W::new(self, 0)
    }
    #[doc = "Bit 2 - The ecc curve select bit of ECDSA Accelerator. 0: P-192. 1: P-256."]
    #[inline(always)]
    pub fn ecc_curve(&mut self) -> ECC_CURVE_W<'_, CONF_SPEC> {
        ECC_CURVE_W::new(self, 2)
    }
    #[doc = "Bit 3 - The source of k select bit. 0: k is automatically generated by hardware. 1: k is written by software."]
    #[inline(always)]
    pub fn software_set_k(&mut self) -> SOFTWARE_SET_K_W<'_, CONF_SPEC> {
        SOFTWARE_SET_K_W::new(self, 3)
    }
    #[doc = "Bit 4 - The source of z select bit. 0: z is generated from SHA result. 1: z is written by software."]
    #[inline(always)]
    pub fn software_set_z(&mut self) -> SOFTWARE_SET_Z_W<'_, CONF_SPEC> {
        SOFTWARE_SET_Z_W::new(self, 4)
    }
    #[doc = "Bit 5 - The source of hardware generated k. 0: k is generated by TRNG. 1: k is generated by deterministic derivation algorithm."]
    #[inline(always)]
    pub fn deterministic_k(&mut self) -> DETERMINISTIC_K_W<'_, CONF_SPEC> {
        DETERMINISTIC_K_W::new(self, 5)
    }
    #[doc = "Bits 6:21 - The (loop number - 1) value in the deterministic derivation algorithm to derive k."]
    #[inline(always)]
    pub fn deterministic_loop(&mut self) -> DETERMINISTIC_LOOP_W<'_, CONF_SPEC> {
        DETERMINISTIC_LOOP_W::new(self, 6)
    }
}
#[doc = "ECDSA configure register\n\nYou can [`read`](crate::Reg::read) this register and get [`conf::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`conf::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
pub struct CONF_SPEC;
impl crate::RegisterSpec for CONF_SPEC {
    type Ux = u32;
}
#[doc = "`read()` method returns [`conf::R`](R) reader structure"]
impl crate::Readable for CONF_SPEC {}
#[doc = "`write(|w| ..)` method takes [`conf::W`](W) writer structure"]
impl crate::Writable for CONF_SPEC {
    type Safety = crate::Unsafe;
}
#[doc = "`reset()` method sets CONF to value 0"]
impl crate::Resettable for CONF_SPEC {}