Type Alias esp32c3::uart0::conf0::R

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pub type R = R<CONF0_SPEC>;
Expand description

Register CONF0 reader

Aliased Type§

struct R { /* private fields */ }

Implementations§

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impl R

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pub fn parity(&self) -> PARITY_R

Bit 0 - This register is used to configure the parity check mode.

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pub fn parity_en(&self) -> PARITY_EN_R

Bit 1 - Set this bit to enable uart parity check.

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pub fn bit_num(&self) -> BIT_NUM_R

Bits 2:3 - This register is used to set the length of data.

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pub fn stop_bit_num(&self) -> STOP_BIT_NUM_R

Bits 4:5 - This register is used to set the length of stop bit.

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pub fn sw_rts(&self) -> SW_RTS_R

Bit 6 - This register is used to configure the software rts signal which is used in software flow control.

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pub fn sw_dtr(&self) -> SW_DTR_R

Bit 7 - This register is used to configure the software dtr signal which is used in software flow control.

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pub fn txd_brk(&self) -> TXD_BRK_R

Bit 8 - Set this bit to enbale transmitter to send NULL when the process of sending data is done.

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pub fn irda_dplx(&self) -> IRDA_DPLX_R

Bit 9 - Set this bit to enable IrDA loopback mode.

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pub fn irda_tx_en(&self) -> IRDA_TX_EN_R

Bit 10 - This is the start enable bit for IrDA transmitter.

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pub fn irda_wctl(&self) -> IRDA_WCTL_R

Bit 11 - 1’h1: The IrDA transmitter’s 11th bit is the same as 10th bit. 1’h0: Set IrDA transmitter’s 11th bit to 0.

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pub fn irda_tx_inv(&self) -> IRDA_TX_INV_R

Bit 12 - Set this bit to invert the level of IrDA transmitter.

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pub fn irda_rx_inv(&self) -> IRDA_RX_INV_R

Bit 13 - Set this bit to invert the level of IrDA receiver.

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pub fn loopback(&self) -> LOOPBACK_R

Bit 14 - Set this bit to enable uart loopback test mode.

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pub fn tx_flow_en(&self) -> TX_FLOW_EN_R

Bit 15 - Set this bit to enable flow control function for transmitter.

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pub fn irda_en(&self) -> IRDA_EN_R

Bit 16 - Set this bit to enable IrDA protocol.

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pub fn rxfifo_rst(&self) -> RXFIFO_RST_R

Bit 17 - Set this bit to reset the uart receive-FIFO.

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pub fn txfifo_rst(&self) -> TXFIFO_RST_R

Bit 18 - Set this bit to reset the uart transmit-FIFO.

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pub fn rxd_inv(&self) -> RXD_INV_R

Bit 19 - Set this bit to inverse the level value of uart rxd signal.

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pub fn cts_inv(&self) -> CTS_INV_R

Bit 20 - Set this bit to inverse the level value of uart cts signal.

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pub fn dsr_inv(&self) -> DSR_INV_R

Bit 21 - Set this bit to inverse the level value of uart dsr signal.

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pub fn txd_inv(&self) -> TXD_INV_R

Bit 22 - Set this bit to inverse the level value of uart txd signal.

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pub fn rts_inv(&self) -> RTS_INV_R

Bit 23 - Set this bit to inverse the level value of uart rts signal.

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pub fn dtr_inv(&self) -> DTR_INV_R

Bit 24 - Set this bit to inverse the level value of uart dtr signal.

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pub fn clk_en(&self) -> CLK_EN_R

Bit 25 - 1’h1: Force clock on for register. 1’h0: Support clock only when application writes registers.

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pub fn err_wr_mask(&self) -> ERR_WR_MASK_R

Bit 26 - 1’h1: Receiver stops storing data into FIFO when data is wrong. 1’h0: Receiver stores the data even if the received data is wrong.

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pub fn autobaud_en(&self) -> AUTOBAUD_EN_R

Bit 27 - This is the enable bit for detecting baudrate.

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pub fn mem_clk_en(&self) -> MEM_CLK_EN_R

Bit 28 - UART memory clock gate enable signal.