Type Alias esp32c3::ledc::int_raw::W

pub type W = W<INT_RAW_SPEC>;

Register INT_RAW writer

Aliased Type

struct W { /* private fields */ }

Implementations

impl W

pub fn timer_ovf(&mut self, n: u8) -> TIMER_OVF_W<'_, INT_RAW_SPEC>

reg_lstimer(0-3)_ovf_int_raw.

NOTE: n is number of field in register. n == 0 corresponds to TIMER0_OVF field

pub fn timer0_ovf(&mut self) -> TIMER_OVF_W<'_, INT_RAW_SPEC>

Bit 0 - reg_lstimer0_ovf_int_raw.

pub fn timer1_ovf(&mut self) -> TIMER_OVF_W<'_, INT_RAW_SPEC>

Bit 1 - reg_lstimer1_ovf_int_raw.

pub fn timer2_ovf(&mut self) -> TIMER_OVF_W<'_, INT_RAW_SPEC>

Bit 2 - reg_lstimer2_ovf_int_raw.

pub fn timer3_ovf(&mut self) -> TIMER_OVF_W<'_, INT_RAW_SPEC>

Bit 3 - reg_lstimer3_ovf_int_raw.

pub fn duty_chng_end_ch( &mut self, n: u8 ) -> DUTY_CHNG_END_CH_W<'_, INT_RAW_SPEC>

Interrupt raw bit for channel (0-5). Triggered when the gradual change of duty has finished.

NOTE: n is number of field in register. n == 0 corresponds to DUTY_CHNG_END_CH0 field

pub fn duty_chng_end_ch0(&mut self) -> DUTY_CHNG_END_CH_W<'_, INT_RAW_SPEC>

Bit 4 - Interrupt raw bit for channel 0. Triggered when the gradual change of duty has finished.

pub fn duty_chng_end_ch1(&mut self) -> DUTY_CHNG_END_CH_W<'_, INT_RAW_SPEC>

Bit 5 - Interrupt raw bit for channel 1. Triggered when the gradual change of duty has finished.

pub fn duty_chng_end_ch2(&mut self) -> DUTY_CHNG_END_CH_W<'_, INT_RAW_SPEC>

Bit 6 - Interrupt raw bit for channel 2. Triggered when the gradual change of duty has finished.

pub fn duty_chng_end_ch3(&mut self) -> DUTY_CHNG_END_CH_W<'_, INT_RAW_SPEC>

Bit 7 - Interrupt raw bit for channel 3. Triggered when the gradual change of duty has finished.

pub fn duty_chng_end_ch4(&mut self) -> DUTY_CHNG_END_CH_W<'_, INT_RAW_SPEC>

Bit 8 - Interrupt raw bit for channel 4. Triggered when the gradual change of duty has finished.

pub fn duty_chng_end_ch5(&mut self) -> DUTY_CHNG_END_CH_W<'_, INT_RAW_SPEC>

Bit 9 - Interrupt raw bit for channel 5. Triggered when the gradual change of duty has finished.

pub fn ovf_cnt_ch(&mut self, n: u8) -> OVF_CNT_CH_W<'_, INT_RAW_SPEC>

Interrupt raw bit for channel (0-5). Triggered when the OVF_CNT has reached the value specified by LEDC.CHx.CONF0.OVF_NUM.

NOTE: n is number of field in register. n == 0 corresponds to OVF_CNT_CH0 field

pub fn ovf_cnt_ch0(&mut self) -> OVF_CNT_CH_W<'_, INT_RAW_SPEC>

Bit 10 - Interrupt raw bit for channel 0. Triggered when the OVF_CNT has reached the value specified by LEDC.CHx.CONF0.OVF_NUM.

pub fn ovf_cnt_ch1(&mut self) -> OVF_CNT_CH_W<'_, INT_RAW_SPEC>

Bit 11 - Interrupt raw bit for channel 1. Triggered when the OVF_CNT has reached the value specified by LEDC.CHx.CONF0.OVF_NUM.

pub fn ovf_cnt_ch2(&mut self) -> OVF_CNT_CH_W<'_, INT_RAW_SPEC>

Bit 12 - Interrupt raw bit for channel 2. Triggered when the OVF_CNT has reached the value specified by LEDC.CHx.CONF0.OVF_NUM.

pub fn ovf_cnt_ch3(&mut self) -> OVF_CNT_CH_W<'_, INT_RAW_SPEC>

Bit 13 - Interrupt raw bit for channel 3. Triggered when the OVF_CNT has reached the value specified by LEDC.CHx.CONF0.OVF_NUM.

pub fn ovf_cnt_ch4(&mut self) -> OVF_CNT_CH_W<'_, INT_RAW_SPEC>

Bit 14 - Interrupt raw bit for channel 4. Triggered when the OVF_CNT has reached the value specified by LEDC.CHx.CONF0.OVF_NUM.

pub fn ovf_cnt_ch5(&mut self) -> OVF_CNT_CH_W<'_, INT_RAW_SPEC>

Bit 15 - Interrupt raw bit for channel 5. Triggered when the OVF_CNT has reached the value specified by LEDC.CHx.CONF0.OVF_NUM.