esp32c3/system/
cpu_per_conf.rs

1#[doc = "Register `CPU_PER_CONF` reader"]
2pub type R = crate::R<CPU_PER_CONF_SPEC>;
3#[doc = "Register `CPU_PER_CONF` writer"]
4pub type W = crate::W<CPU_PER_CONF_SPEC>;
5#[doc = "Field `CPUPERIOD_SEL` reader - reg_cpuperiod_sel"]
6pub type CPUPERIOD_SEL_R = crate::FieldReader;
7#[doc = "Field `CPUPERIOD_SEL` writer - reg_cpuperiod_sel"]
8pub type CPUPERIOD_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 2>;
9#[doc = "Field `PLL_FREQ_SEL` reader - reg_pll_freq_sel"]
10pub type PLL_FREQ_SEL_R = crate::BitReader;
11#[doc = "Field `PLL_FREQ_SEL` writer - reg_pll_freq_sel"]
12pub type PLL_FREQ_SEL_W<'a, REG> = crate::BitWriter<'a, REG>;
13#[doc = "Field `CPU_WAIT_MODE_FORCE_ON` reader - reg_cpu_wait_mode_force_on"]
14pub type CPU_WAIT_MODE_FORCE_ON_R = crate::BitReader;
15#[doc = "Field `CPU_WAIT_MODE_FORCE_ON` writer - reg_cpu_wait_mode_force_on"]
16pub type CPU_WAIT_MODE_FORCE_ON_W<'a, REG> = crate::BitWriter<'a, REG>;
17#[doc = "Field `CPU_WAITI_DELAY_NUM` reader - reg_cpu_waiti_delay_num"]
18pub type CPU_WAITI_DELAY_NUM_R = crate::FieldReader;
19#[doc = "Field `CPU_WAITI_DELAY_NUM` writer - reg_cpu_waiti_delay_num"]
20pub type CPU_WAITI_DELAY_NUM_W<'a, REG> = crate::FieldWriter<'a, REG, 4>;
21impl R {
22    #[doc = "Bits 0:1 - reg_cpuperiod_sel"]
23    #[inline(always)]
24    pub fn cpuperiod_sel(&self) -> CPUPERIOD_SEL_R {
25        CPUPERIOD_SEL_R::new((self.bits & 3) as u8)
26    }
27    #[doc = "Bit 2 - reg_pll_freq_sel"]
28    #[inline(always)]
29    pub fn pll_freq_sel(&self) -> PLL_FREQ_SEL_R {
30        PLL_FREQ_SEL_R::new(((self.bits >> 2) & 1) != 0)
31    }
32    #[doc = "Bit 3 - reg_cpu_wait_mode_force_on"]
33    #[inline(always)]
34    pub fn cpu_wait_mode_force_on(&self) -> CPU_WAIT_MODE_FORCE_ON_R {
35        CPU_WAIT_MODE_FORCE_ON_R::new(((self.bits >> 3) & 1) != 0)
36    }
37    #[doc = "Bits 4:7 - reg_cpu_waiti_delay_num"]
38    #[inline(always)]
39    pub fn cpu_waiti_delay_num(&self) -> CPU_WAITI_DELAY_NUM_R {
40        CPU_WAITI_DELAY_NUM_R::new(((self.bits >> 4) & 0x0f) as u8)
41    }
42}
43#[cfg(feature = "impl-register-debug")]
44impl core::fmt::Debug for R {
45    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
46        f.debug_struct("CPU_PER_CONF")
47            .field("cpuperiod_sel", &self.cpuperiod_sel())
48            .field("pll_freq_sel", &self.pll_freq_sel())
49            .field("cpu_wait_mode_force_on", &self.cpu_wait_mode_force_on())
50            .field("cpu_waiti_delay_num", &self.cpu_waiti_delay_num())
51            .finish()
52    }
53}
54impl W {
55    #[doc = "Bits 0:1 - reg_cpuperiod_sel"]
56    #[inline(always)]
57    pub fn cpuperiod_sel(&mut self) -> CPUPERIOD_SEL_W<CPU_PER_CONF_SPEC> {
58        CPUPERIOD_SEL_W::new(self, 0)
59    }
60    #[doc = "Bit 2 - reg_pll_freq_sel"]
61    #[inline(always)]
62    pub fn pll_freq_sel(&mut self) -> PLL_FREQ_SEL_W<CPU_PER_CONF_SPEC> {
63        PLL_FREQ_SEL_W::new(self, 2)
64    }
65    #[doc = "Bit 3 - reg_cpu_wait_mode_force_on"]
66    #[inline(always)]
67    pub fn cpu_wait_mode_force_on(&mut self) -> CPU_WAIT_MODE_FORCE_ON_W<CPU_PER_CONF_SPEC> {
68        CPU_WAIT_MODE_FORCE_ON_W::new(self, 3)
69    }
70    #[doc = "Bits 4:7 - reg_cpu_waiti_delay_num"]
71    #[inline(always)]
72    pub fn cpu_waiti_delay_num(&mut self) -> CPU_WAITI_DELAY_NUM_W<CPU_PER_CONF_SPEC> {
73        CPU_WAITI_DELAY_NUM_W::new(self, 4)
74    }
75}
76#[doc = "cpu clock config register\n\nYou can [`read`](crate::Reg::read) this register and get [`cpu_per_conf::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cpu_per_conf::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
77pub struct CPU_PER_CONF_SPEC;
78impl crate::RegisterSpec for CPU_PER_CONF_SPEC {
79    type Ux = u32;
80}
81#[doc = "`read()` method returns [`cpu_per_conf::R`](R) reader structure"]
82impl crate::Readable for CPU_PER_CONF_SPEC {}
83#[doc = "`write(|w| ..)` method takes [`cpu_per_conf::W`](W) writer structure"]
84impl crate::Writable for CPU_PER_CONF_SPEC {
85    type Safety = crate::Unsafe;
86    const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
87    const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
88}
89#[doc = "`reset()` method sets CPU_PER_CONF to value 0x0c"]
90impl crate::Resettable for CPU_PER_CONF_SPEC {
91    const RESET_VALUE: u32 = 0x0c;
92}
esp32c3/system/cpu_per_conf.rs

esp32c3/system/
cpu_per_conf.rs
