1#[repr(C)]
2#[cfg_attr(feature = "impl-register-debug", derive(Debug))]
3#[doc = "Register block"]
4pub struct RegisterBlock {
5 cmd: CMD,
6 addr: ADDR,
7 ctrl: CTRL,
8 clock: CLOCK,
9 user: USER,
10 user1: USER1,
11 user2: USER2,
12 ms_dlen: MS_DLEN,
13 misc: MISC,
14 din_mode: DIN_MODE,
15 din_num: DIN_NUM,
16 dout_mode: DOUT_MODE,
17 dma_conf: DMA_CONF,
18 dma_int_ena: DMA_INT_ENA,
19 dma_int_clr: DMA_INT_CLR,
20 dma_int_raw: DMA_INT_RAW,
21 dma_int_st: DMA_INT_ST,
22 dma_int_set: DMA_INT_SET,
23 _reserved18: [u8; 0x50],
24 w: [W; 16],
25 _reserved19: [u8; 0x08],
26 slave: SLAVE,
27 slave1: SLAVE1,
28 clk_gate: CLK_GATE,
29 _reserved22: [u8; 0x04],
30 date: DATE,
31}
32impl RegisterBlock {
33 #[doc = "0x00 - Command control register"]
34 #[inline(always)]
35 pub const fn cmd(&self) -> &CMD {
36 &self.cmd
37 }
38 #[doc = "0x04 - Address value register"]
39 #[inline(always)]
40 pub const fn addr(&self) -> &ADDR {
41 &self.addr
42 }
43 #[doc = "0x08 - SPI control register"]
44 #[inline(always)]
45 pub const fn ctrl(&self) -> &CTRL {
46 &self.ctrl
47 }
48 #[doc = "0x0c - SPI clock control register"]
49 #[inline(always)]
50 pub const fn clock(&self) -> &CLOCK {
51 &self.clock
52 }
53 #[doc = "0x10 - SPI USER control register"]
54 #[inline(always)]
55 pub const fn user(&self) -> &USER {
56 &self.user
57 }
58 #[doc = "0x14 - SPI USER control register 1"]
59 #[inline(always)]
60 pub const fn user1(&self) -> &USER1 {
61 &self.user1
62 }
63 #[doc = "0x18 - SPI USER control register 2"]
64 #[inline(always)]
65 pub const fn user2(&self) -> &USER2 {
66 &self.user2
67 }
68 #[doc = "0x1c - SPI data bit length control register"]
69 #[inline(always)]
70 pub const fn ms_dlen(&self) -> &MS_DLEN {
71 &self.ms_dlen
72 }
73 #[doc = "0x20 - SPI misc register"]
74 #[inline(always)]
75 pub const fn misc(&self) -> &MISC {
76 &self.misc
77 }
78 #[doc = "0x24 - SPI input delay mode configuration"]
79 #[inline(always)]
80 pub const fn din_mode(&self) -> &DIN_MODE {
81 &self.din_mode
82 }
83 #[doc = "0x28 - SPI input delay number configuration"]
84 #[inline(always)]
85 pub const fn din_num(&self) -> &DIN_NUM {
86 &self.din_num
87 }
88 #[doc = "0x2c - SPI output delay mode configuration"]
89 #[inline(always)]
90 pub const fn dout_mode(&self) -> &DOUT_MODE {
91 &self.dout_mode
92 }
93 #[doc = "0x30 - SPI DMA control register"]
94 #[inline(always)]
95 pub const fn dma_conf(&self) -> &DMA_CONF {
96 &self.dma_conf
97 }
98 #[doc = "0x34 - SPI interrupt enable register"]
99 #[inline(always)]
100 pub const fn dma_int_ena(&self) -> &DMA_INT_ENA {
101 &self.dma_int_ena
102 }
103 #[doc = "0x38 - SPI interrupt clear register"]
104 #[inline(always)]
105 pub const fn dma_int_clr(&self) -> &DMA_INT_CLR {
106 &self.dma_int_clr
107 }
108 #[doc = "0x3c - SPI interrupt raw register"]
109 #[inline(always)]
110 pub const fn dma_int_raw(&self) -> &DMA_INT_RAW {
111 &self.dma_int_raw
112 }
113 #[doc = "0x40 - SPI interrupt status register"]
114 #[inline(always)]
115 pub const fn dma_int_st(&self) -> &DMA_INT_ST {
116 &self.dma_int_st
117 }
118 #[doc = "0x44 - SPI interrupt software set register"]
119 #[inline(always)]
120 pub const fn dma_int_set(&self) -> &DMA_INT_SET {
121 &self.dma_int_set
122 }
123 #[doc = "0x98..0xd8 - SPI CPU-controlled buffer%s"]
124 #[inline(always)]
125 pub const fn w(&self, n: usize) -> &W {
126 &self.w[n]
127 }
128 #[doc = "Iterator for array of:"]
129 #[doc = "0x98..0xd8 - SPI CPU-controlled buffer%s"]
130 #[inline(always)]
131 pub fn w_iter(&self) -> impl Iterator<Item = &W> {
132 self.w.iter()
133 }
134 #[doc = "0xe0 - SPI slave control register"]
135 #[inline(always)]
136 pub const fn slave(&self) -> &SLAVE {
137 &self.slave
138 }
139 #[doc = "0xe4 - SPI slave control register 1"]
140 #[inline(always)]
141 pub const fn slave1(&self) -> &SLAVE1 {
142 &self.slave1
143 }
144 #[doc = "0xe8 - SPI module clock and register clock control"]
145 #[inline(always)]
146 pub const fn clk_gate(&self) -> &CLK_GATE {
147 &self.clk_gate
148 }
149 #[doc = "0xf0 - Version control"]
150 #[inline(always)]
151 pub const fn date(&self) -> &DATE {
152 &self.date
153 }
154}
155#[doc = "CMD (rw) register accessor: Command control register\n\nYou can [`read`](crate::Reg::read) this register and get [`cmd::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cmd::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cmd`] module"]
156pub type CMD = crate::Reg<cmd::CMD_SPEC>;
157#[doc = "Command control register"]
158pub mod cmd;
159#[doc = "ADDR (rw) register accessor: Address value register\n\nYou can [`read`](crate::Reg::read) this register and get [`addr::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`addr::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@addr`] module"]
160pub type ADDR = crate::Reg<addr::ADDR_SPEC>;
161#[doc = "Address value register"]
162pub mod addr;
163#[doc = "CTRL (rw) register accessor: SPI control register\n\nYou can [`read`](crate::Reg::read) this register and get [`ctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ctrl`] module"]
164pub type CTRL = crate::Reg<ctrl::CTRL_SPEC>;
165#[doc = "SPI control register"]
166pub mod ctrl;
167#[doc = "CLOCK (rw) register accessor: SPI clock control register\n\nYou can [`read`](crate::Reg::read) this register and get [`clock::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`clock::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@clock`] module"]
168pub type CLOCK = crate::Reg<clock::CLOCK_SPEC>;
169#[doc = "SPI clock control register"]
170pub mod clock;
171#[doc = "USER (rw) register accessor: SPI USER control register\n\nYou can [`read`](crate::Reg::read) this register and get [`user::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`user::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@user`] module"]
172pub type USER = crate::Reg<user::USER_SPEC>;
173#[doc = "SPI USER control register"]
174pub mod user;
175#[doc = "USER1 (rw) register accessor: SPI USER control register 1\n\nYou can [`read`](crate::Reg::read) this register and get [`user1::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`user1::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@user1`] module"]
176pub type USER1 = crate::Reg<user1::USER1_SPEC>;
177#[doc = "SPI USER control register 1"]
178pub mod user1;
179#[doc = "USER2 (rw) register accessor: SPI USER control register 2\n\nYou can [`read`](crate::Reg::read) this register and get [`user2::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`user2::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@user2`] module"]
180pub type USER2 = crate::Reg<user2::USER2_SPEC>;
181#[doc = "SPI USER control register 2"]
182pub mod user2;
183#[doc = "MS_DLEN (rw) register accessor: SPI data bit length control register\n\nYou can [`read`](crate::Reg::read) this register and get [`ms_dlen::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ms_dlen::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ms_dlen`] module"]
184pub type MS_DLEN = crate::Reg<ms_dlen::MS_DLEN_SPEC>;
185#[doc = "SPI data bit length control register"]
186pub mod ms_dlen;
187#[doc = "MISC (rw) register accessor: SPI misc register\n\nYou can [`read`](crate::Reg::read) this register and get [`misc::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`misc::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@misc`] module"]
188pub type MISC = crate::Reg<misc::MISC_SPEC>;
189#[doc = "SPI misc register"]
190pub mod misc;
191#[doc = "DIN_MODE (r) register accessor: SPI input delay mode configuration\n\nYou can [`read`](crate::Reg::read) this register and get [`din_mode::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@din_mode`] module"]
192pub type DIN_MODE = crate::Reg<din_mode::DIN_MODE_SPEC>;
193#[doc = "SPI input delay mode configuration"]
194pub mod din_mode;
195#[doc = "DIN_NUM (r) register accessor: SPI input delay number configuration\n\nYou can [`read`](crate::Reg::read) this register and get [`din_num::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@din_num`] module"]
196pub type DIN_NUM = crate::Reg<din_num::DIN_NUM_SPEC>;
197#[doc = "SPI input delay number configuration"]
198pub mod din_num;
199#[doc = "DOUT_MODE (r) register accessor: SPI output delay mode configuration\n\nYou can [`read`](crate::Reg::read) this register and get [`dout_mode::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dout_mode`] module"]
200pub type DOUT_MODE = crate::Reg<dout_mode::DOUT_MODE_SPEC>;
201#[doc = "SPI output delay mode configuration"]
202pub mod dout_mode;
203#[doc = "DMA_CONF (rw) register accessor: SPI DMA control register\n\nYou can [`read`](crate::Reg::read) this register and get [`dma_conf::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dma_conf::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dma_conf`] module"]
204pub type DMA_CONF = crate::Reg<dma_conf::DMA_CONF_SPEC>;
205#[doc = "SPI DMA control register"]
206pub mod dma_conf;
207#[doc = "DMA_INT_ENA (rw) register accessor: SPI interrupt enable register\n\nYou can [`read`](crate::Reg::read) this register and get [`dma_int_ena::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dma_int_ena::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dma_int_ena`] module"]
208pub type DMA_INT_ENA = crate::Reg<dma_int_ena::DMA_INT_ENA_SPEC>;
209#[doc = "SPI interrupt enable register"]
210pub mod dma_int_ena;
211#[doc = "DMA_INT_CLR (w) register accessor: SPI interrupt clear register\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dma_int_clr::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dma_int_clr`] module"]
212pub type DMA_INT_CLR = crate::Reg<dma_int_clr::DMA_INT_CLR_SPEC>;
213#[doc = "SPI interrupt clear register"]
214pub mod dma_int_clr;
215#[doc = "DMA_INT_RAW (rw) register accessor: SPI interrupt raw register\n\nYou can [`read`](crate::Reg::read) this register and get [`dma_int_raw::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dma_int_raw::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dma_int_raw`] module"]
216pub type DMA_INT_RAW = crate::Reg<dma_int_raw::DMA_INT_RAW_SPEC>;
217#[doc = "SPI interrupt raw register"]
218pub mod dma_int_raw;
219#[doc = "DMA_INT_ST (r) register accessor: SPI interrupt status register\n\nYou can [`read`](crate::Reg::read) this register and get [`dma_int_st::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dma_int_st`] module"]
220pub type DMA_INT_ST = crate::Reg<dma_int_st::DMA_INT_ST_SPEC>;
221#[doc = "SPI interrupt status register"]
222pub mod dma_int_st;
223#[doc = "DMA_INT_SET (w) register accessor: SPI interrupt software set register\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dma_int_set::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dma_int_set`] module"]
224pub type DMA_INT_SET = crate::Reg<dma_int_set::DMA_INT_SET_SPEC>;
225#[doc = "SPI interrupt software set register"]
226pub mod dma_int_set;
227#[doc = "W (rw) register accessor: SPI CPU-controlled buffer%s\n\nYou can [`read`](crate::Reg::read) this register and get [`w::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`w::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@w`] module"]
228pub type W = crate::Reg<w::W_SPEC>;
229#[doc = "SPI CPU-controlled buffer%s"]
230pub mod w;
231#[doc = "SLAVE (rw) register accessor: SPI slave control register\n\nYou can [`read`](crate::Reg::read) this register and get [`slave::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`slave::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@slave`] module"]
232pub type SLAVE = crate::Reg<slave::SLAVE_SPEC>;
233#[doc = "SPI slave control register"]
234pub mod slave;
235#[doc = "SLAVE1 (rw) register accessor: SPI slave control register 1\n\nYou can [`read`](crate::Reg::read) this register and get [`slave1::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`slave1::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@slave1`] module"]
236pub type SLAVE1 = crate::Reg<slave1::SLAVE1_SPEC>;
237#[doc = "SPI slave control register 1"]
238pub mod slave1;
239#[doc = "CLK_GATE (rw) register accessor: SPI module clock and register clock control\n\nYou can [`read`](crate::Reg::read) this register and get [`clk_gate::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`clk_gate::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@clk_gate`] module"]
240pub type CLK_GATE = crate::Reg<clk_gate::CLK_GATE_SPEC>;
241#[doc = "SPI module clock and register clock control"]
242pub mod clk_gate;
243#[doc = "DATE (rw) register accessor: Version control\n\nYou can [`read`](crate::Reg::read) this register and get [`date::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`date::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@date`] module"]
244pub type DATE = crate::Reg<date::DATE_SPEC>;
245#[doc = "Version control"]
246pub mod date;